summaryrefslogtreecommitdiff
path: root/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.h
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.h')
-rw-r--r--firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.h b/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.h
index baa7083760..ed23e84936 100644
--- a/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.h
+++ b/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.h
@@ -24,8 +24,38 @@
24 24
25#include "config.h" 25#include "config.h"
26 26
27/* HDQ (bq27000) RAM registers */
28#define HDQ_REG_CTRL 0x00
29#define HDQ_REG_MODE 0x01
30#define HDQ_REG_AR 0x02
31#define HDQ_REG_ARTTE 0x04
32#define HDQ_REG_TEMP 0x06
33#define HDQ_REG_VOLT 0x08
34#define HDQ_REG_FLAGS 0x0A
35#define HDQ_REG_RSOC 0x0B
36#define HDQ_REG_NAC 0x0C
37#define HDQ_REG_CACD 0x0E
38#define HDQ_REG_CACT 0x10
39#define HDQ_REG_LMD 0x12
40#define HDQ_REG_AI 0x14
41#define HDQ_REG_TTE 0x16
42#define HDQ_REG_TTF 0x18
43#define HDQ_REG_SI 0x1A
44#define HDQ_REG_STTE 0x1C
45#define HDQ_REG_MLI 0x1E
46#define HDQ_REG_MLTTE 0x20
47#define HDQ_REG_SAE 0x22
48#define HDQ_REG_AP 0x24
49#define HDQ_REG_TTECP 0x26
50#define HDQ_REG_CYCL 0x28
51#define HDQ_REG_CYCT 0x2A
52#define HDQ_REG_CSOC 0x2C
53
27void avr_hid_init(void); 54void avr_hid_init(void);
28 55
56int avr_hid_hdq_read_byte(uint8_t address);
57int avr_hid_hdq_read_short(uint8_t address);
58
29void avr_hid_enable_charger(void); 59void avr_hid_enable_charger(void);
30 60
31void avr_hid_wifi_pd(int high); 61void avr_hid_wifi_pd(int high);