diff options
Diffstat (limited to 'firmware/target/arm/tms320dm320/mrobe-500')
-rwxr-xr-x | firmware/target/arm/tms320dm320/mrobe-500/crt0.S | 206 | ||||
-rwxr-xr-x | firmware/target/arm/tms320dm320/mrobe-500/dm320codec-mr500.c (renamed from firmware/target/arm/tms320dm320/mrobe-500/system-target.h) | 29 | ||||
-rw-r--r-- | firmware/target/arm/tms320dm320/mrobe-500/lcd-mr500.c | 3 | ||||
-rwxr-xr-x[-rw-r--r--] | firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c (renamed from firmware/target/arm/tms320dm320/mrobe-500/kernel-mr500.c) | 82 | ||||
-rwxr-xr-x[-rw-r--r--] | firmware/target/arm/tms320dm320/mrobe-500/powermgmt-mr500.c (renamed from firmware/target/arm/tms320dm320/mrobe-500/spi-target.h) | 40 | ||||
-rw-r--r-- | firmware/target/arm/tms320dm320/mrobe-500/spi-mr500.c | 77 | ||||
-rw-r--r-- | firmware/target/arm/tms320dm320/mrobe-500/system-mr500.c | 210 | ||||
-rw-r--r-- | firmware/target/arm/tms320dm320/mrobe-500/timer-mr500.c | 106 | ||||
-rw-r--r-- | firmware/target/arm/tms320dm320/mrobe-500/timer-target.h | 39 | ||||
-rw-r--r-- | firmware/target/arm/tms320dm320/mrobe-500/uart-mr500.c | 172 | ||||
-rw-r--r-- | firmware/target/arm/tms320dm320/mrobe-500/uart-target.h | 33 |
11 files changed, 103 insertions, 894 deletions
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/crt0.S b/firmware/target/arm/tms320dm320/mrobe-500/crt0.S deleted file mode 100755 index 193470fd4a..0000000000 --- a/firmware/target/arm/tms320dm320/mrobe-500/crt0.S +++ /dev/null | |||
@@ -1,206 +0,0 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2002 by Linus Nielsen Feltzing | ||
11 | * | ||
12 | * Arm bootloader and startup code based on startup.s from the iPodLinux loader | ||
13 | * | ||
14 | * Copyright (c) 2003, Daniel Palffy (dpalffy (at) rainstorm.org) | ||
15 | * Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org> | ||
16 | * | ||
17 | * All files in this archive are subject to the GNU General Public License. | ||
18 | * See the file COPYING in the source tree root for full license agreement. | ||
19 | * | ||
20 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
21 | * KIND, either express or implied. | ||
22 | * | ||
23 | ****************************************************************************/ | ||
24 | #include "config.h" | ||
25 | #include "cpu.h" | ||
26 | |||
27 | .section .init.text,"ax",%progbits | ||
28 | |||
29 | .global start | ||
30 | start: | ||
31 | msr cpsr, #0xd3 /* enter supervisor mode, disable IRQ */ | ||
32 | |||
33 | #if !defined(DEBUG) | ||
34 | /* Copy exception handler code to address 0 */ | ||
35 | ldr r2, =_vectorsstart | ||
36 | ldr r3, =_vectorsend | ||
37 | ldr r4, =_vectorscopy | ||
38 | 1: | ||
39 | cmp r3, r2 | ||
40 | ldrhi r5, [r4], #4 | ||
41 | strhi r5, [r2], #4 | ||
42 | bhi 1b | ||
43 | #else | ||
44 | ldr r1, =vectors | ||
45 | ldr r0, =irq_handler | ||
46 | str r0, [r1, #24] | ||
47 | ldr r0, =fiq_handler | ||
48 | str r0, [r1, #28] | ||
49 | #endif | ||
50 | |||
51 | /* Disable high vectors (at 0xffff0000 instead of 0x00000000) */ | ||
52 | mrc p15, 0, r0, c1, c0 | ||
53 | and r0, r0, #~(1<<13) | ||
54 | mcr p15, 0, r0, c1, c0 | ||
55 | |||
56 | #if !defined(BOOTLOADER) | ||
57 | |||
58 | #if !defined(STUB) | ||
59 | /* Zero out IBSS */ | ||
60 | ldr r2, =_iedata | ||
61 | ldr r3, =_iend | ||
62 | mov r4, #0 | ||
63 | 1: | ||
64 | cmp r3, r2 | ||
65 | strhi r4, [r2], #4 | ||
66 | bhi 1b | ||
67 | |||
68 | /* Copy the IRAM */ | ||
69 | ldr r2, =_iramcopy | ||
70 | ldr r3, =_iramstart | ||
71 | ldr r4, =_iramend | ||
72 | 1: | ||
73 | cmp r4, r3 | ||
74 | ldrhi r5, [r2], #4 | ||
75 | strhi r5, [r3], #4 | ||
76 | bhi 1b | ||
77 | #endif /* !STUB */ | ||
78 | #endif /* !BOOTLOADER */ | ||
79 | |||
80 | /* Initialise bss section to zero */ | ||
81 | ldr r2, =_edata | ||
82 | ldr r3, =_end | ||
83 | mov r4, #0 | ||
84 | 1: | ||
85 | cmp r3, r2 | ||
86 | strhi r4, [r2], #4 | ||
87 | bhi 1b | ||
88 | |||
89 | /* Set up some stack and munge it with 0xdeadbeef */ | ||
90 | ldr r3, =stackend | ||
91 | ldr r2, =stackbegin | ||
92 | ldr r4, =0xdeadbeef | ||
93 | 1: | ||
94 | cmp r3, r2 | ||
95 | strhi r4, [r2], #4 | ||
96 | bhi 1b | ||
97 | |||
98 | /* Set up stack for IRQ mode */ | ||
99 | msr cpsr_c, #0xd2 | ||
100 | ldr sp, =irq_stack | ||
101 | /* Set up stack for FIQ mode */ | ||
102 | msr cpsr_c, #0xd1 | ||
103 | ldr sp, =fiq_stack | ||
104 | |||
105 | /* Let abort and undefined modes use IRQ stack */ | ||
106 | msr cpsr_c, #0xd7 | ||
107 | ldr sp, =irq_stack | ||
108 | msr cpsr_c, #0xdb | ||
109 | ldr sp, =irq_stack | ||
110 | /* Switch to supervisor mode (no IRQ) */ | ||
111 | msr cpsr_c, #0xd3 | ||
112 | ldr sp, =stackend | ||
113 | |||
114 | #ifdef BOOTLOADER | ||
115 | /* get the high part of our execute address */ | ||
116 | ldr r2, =0xffffff00 | ||
117 | and r4, pc, r2 | ||
118 | |||
119 | /* Copy bootloader to safe area - 0x01900000 */ | ||
120 | mov r5, #0x00900000 | ||
121 | add r5, r5, #0x01000000 | ||
122 | ldr r6, = _dataend | ||
123 | sub r0, r6, r5 /* length of loader */ | ||
124 | add r0, r4, r0 /* r0 points to start of loader */ | ||
125 | 1: | ||
126 | cmp r5, r6 | ||
127 | ldrcc r2, [r4], #4 | ||
128 | strcc r2, [r5], #4 | ||
129 | bcc 1b | ||
130 | |||
131 | ldr pc, =start_loc /* jump to the relocated start_loc: */ | ||
132 | |||
133 | #endif | ||
134 | |||
135 | start_loc: | ||
136 | bl main | ||
137 | /* main() should never return */ | ||
138 | |||
139 | /* Exception handlers. Will be copied to address 0 after memory remapping */ | ||
140 | .section .vectors,"aw" | ||
141 | ldr pc, [pc, #24] | ||
142 | ldr pc, [pc, #24] | ||
143 | ldr pc, [pc, #24] | ||
144 | ldr pc, [pc, #24] | ||
145 | ldr pc, [pc, #24] | ||
146 | ldr pc, [pc, #24] | ||
147 | ldr pc, [pc, #24] | ||
148 | ldr pc, [pc, #24] | ||
149 | |||
150 | /* Exception vectors */ | ||
151 | .global vectors | ||
152 | vectors: | ||
153 | .word start | ||
154 | .word undef_instr_handler | ||
155 | .word software_int_handler | ||
156 | .word prefetch_abort_handler | ||
157 | .word data_abort_handler | ||
158 | .word reserved_handler | ||
159 | .word irq_handler | ||
160 | .word fiq_handler | ||
161 | |||
162 | .text | ||
163 | |||
164 | #if !defined(STUB) | ||
165 | .global irq | ||
166 | .global fiq | ||
167 | .global UIE | ||
168 | #endif | ||
169 | |||
170 | /* All illegal exceptions call into UIE with exception address as first | ||
171 | parameter. This is calculated differently depending on which exception | ||
172 | we're in. Second parameter is exception number, used for a string lookup | ||
173 | in UIE. | ||
174 | */ | ||
175 | undef_instr_handler: | ||
176 | mov r0, lr | ||
177 | mov r1, #0 | ||
178 | b UIE | ||
179 | |||
180 | /* We run supervisor mode most of the time, and should never see a software | ||
181 | exception being thrown. Perhaps make it illegal and call UIE? | ||
182 | */ | ||
183 | software_int_handler: | ||
184 | reserved_handler: | ||
185 | movs pc, lr | ||
186 | |||
187 | prefetch_abort_handler: | ||
188 | sub r0, lr, #4 | ||
189 | mov r1, #1 | ||
190 | b UIE | ||
191 | |||
192 | data_abort_handler: | ||
193 | sub r0, lr, #8 | ||
194 | mov r1, #2 | ||
195 | b UIE | ||
196 | |||
197 | UIE: | ||
198 | b UIE | ||
199 | |||
200 | /* 256 words of IRQ stack */ | ||
201 | .space 256*4 | ||
202 | irq_stack: | ||
203 | |||
204 | /* 256 words of FIQ stack */ | ||
205 | .space 256*4 | ||
206 | fiq_stack: | ||
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/system-target.h b/firmware/target/arm/tms320dm320/mrobe-500/dm320codec-mr500.c index 7adfda6f7d..eed1f8d3a0 100755 --- a/firmware/target/arm/tms320dm320/mrobe-500/system-target.h +++ b/firmware/target/arm/tms320dm320/mrobe-500/dm320codec-mr500.c | |||
@@ -7,7 +7,7 @@ | |||
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id$ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2002 by Karl Kurbjun | 10 | * Copyright (c) 2007 by Karl Kurbjun |
11 | * | 11 | * |
12 | * All files in this archive are subject to the GNU General Public License. | 12 | * All files in this archive are subject to the GNU General Public License. |
13 | * See the file COPYING in the source tree root for full license agreement. | 13 | * See the file COPYING in the source tree root for full license agreement. |
@@ -16,17 +16,24 @@ | |||
16 | * KIND, either express or implied. | 16 | * KIND, either express or implied. |
17 | * | 17 | * |
18 | ****************************************************************************/ | 18 | ****************************************************************************/ |
19 | #ifndef SYSTEM_TARGET_H | 19 | #include "cpu.h" |
20 | #define SYSTEM_TARGET_H | 20 | #include "kernel.h" |
21 | #include "sound.h" | ||
21 | 22 | ||
22 | #include "system-arm.h" | 23 | const struct sound_settings_info audiohw_settings[] = { |
24 | [SOUND_VOLUME] = {"dB", 0, 1, -74, 6, -25}, | ||
25 | [SOUND_BASS] = {"dB", 1, 15, -60, 90, 0}, | ||
26 | [SOUND_TREBLE] = {"dB", 1, 15, -60, 90, 0}, | ||
27 | [SOUND_BALANCE] = {"%", 0, 1,-100, 100, 0}, | ||
28 | [SOUND_CHANNELS] = {"", 0, 1, 0, 5, 0}, | ||
29 | [SOUND_STEREO_WIDTH] = {"%", 0, 1, 0, 255, 100}, | ||
30 | }; | ||
23 | 31 | ||
24 | #define CPUFREQ_SLEEP 32768 | ||
25 | #define CPUFREQ_DEFAULT 24000000 | ||
26 | #define CPUFREQ_NORMAL 30000000 | ||
27 | #define CPUFREQ_MAX 80000000 | ||
28 | 32 | ||
29 | #define inw(p) (*((volatile unsigned short*)((p) + PHY_IO_BASE))) | 33 | void audiohw_init(void) |
30 | #define outw(v,p) (*((volatile unsigned short*)((p) + PHY_IO_BASE)) = (v)) | 34 | { |
35 | } | ||
31 | 36 | ||
32 | #endif /* SYSTEM_TARGET_H */ | 37 | void audiohw_close(void) |
38 | { | ||
39 | } | ||
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/lcd-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/lcd-mr500.c index 6c06e070f9..aad7733154 100644 --- a/firmware/target/arm/tms320dm320/mrobe-500/lcd-mr500.c +++ b/firmware/target/arm/tms320dm320/mrobe-500/lcd-mr500.c | |||
@@ -167,8 +167,9 @@ void lcd_yuv_blit(unsigned char * const src[3], | |||
167 | 167 | ||
168 | do | 168 | do |
169 | { | 169 | { |
170 | lcd_write_yuv420_lines(dst, chroma_buf, yuv_src, width, | 170 | /* lcd_write_yuv420_lines(dst, chroma_buf, yuv_src, width, |
171 | stride); | 171 | stride); |
172 | */ | ||
172 | yuv_src[0] += stride << 1; /* Skip down two luma lines */ | 173 | yuv_src[0] += stride << 1; /* Skip down two luma lines */ |
173 | yuv_src[1] += stride >> 1; /* Skip down one chroma line */ | 174 | yuv_src[1] += stride >> 1; /* Skip down one chroma line */ |
174 | yuv_src[2] += stride >> 1; | 175 | yuv_src[2] += stride >> 1; |
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/kernel-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c index be2b14b3cb..3bc9124674 100644..100755 --- a/firmware/target/arm/tms320dm320/mrobe-500/kernel-mr500.c +++ b/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c | |||
@@ -16,48 +16,70 @@ | |||
16 | * KIND, either express or implied. | 16 | * KIND, either express or implied. |
17 | * | 17 | * |
18 | ****************************************************************************/ | 18 | ****************************************************************************/ |
19 | 19 | #include <stdlib.h> | |
20 | #include "config.h" | ||
21 | #include "system.h" | 20 | #include "system.h" |
22 | #include "kernel.h" | 21 | #include "kernel.h" |
23 | #include "timer.h" | 22 | #include "logf.h" |
24 | #include "thread.h" | 23 | #include "audio.h" |
24 | #include "sound.h" | ||
25 | #include "file.h" | ||
25 | 26 | ||
26 | extern void (*tick_funcs[MAX_NUM_TICK_TASKS])(void); | 27 | static void _pcm_apply_settings(void) |
28 | { | ||
29 | } | ||
27 | 30 | ||
28 | void tick_start(unsigned int interval_in_ms) | 31 | void pcm_apply_settings(void) |
29 | { | 32 | { |
30 | IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_STOP; | 33 | } |
31 | |||
32 | /* Setup the Prescalar (Divide by 10) | ||
33 | * Based on linux/include/asm-arm/arch-integrator/timex.h | ||
34 | */ | ||
35 | IO_TIMER1_TMPRSCL = 0x000A; | ||
36 | 34 | ||
37 | /* Setup the Divisor */ | 35 | void pcm_init(void) |
38 | IO_TIMER1_TMDIV = (TIMER_FREQ / (10*1000))*interval_in_ms; | 36 | { |
37 | } | ||
39 | 38 | ||
40 | /* Turn Timer1 to Free Run mode */ | 39 | void pcm_postinit(void) |
41 | IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_FREE_RUN; | 40 | { |
41 | } | ||
42 | |||
43 | void pcm_play_dma_start(const void *addr, size_t size) | ||
44 | { | ||
42 | 45 | ||
43 | /* Enable the interrupt */ | ||
44 | IO_INTC_EINT0 |= 1<<IRQ_TIMER1; | ||
45 | } | 46 | } |
46 | 47 | ||
47 | void TIMER1(void) | 48 | static void pcm_play_dma_stop_fiq(void) |
48 | { | 49 | { |
49 | int i; | ||
50 | 50 | ||
51 | /* Run through the list of tick tasks */ | 51 | } |
52 | for(i = 0; i < MAX_NUM_TICK_TASKS; i++) | ||
53 | { | ||
54 | if(tick_funcs[i]) | ||
55 | { | ||
56 | tick_funcs[i](); | ||
57 | } | ||
58 | } | ||
59 | 52 | ||
60 | current_tick++; | 53 | void pcm_play_dma_stop(void) |
54 | { | ||
61 | 55 | ||
62 | IO_INTC_IRQ0 = 1<<IRQ_TIMER1; | ||
63 | } | 56 | } |
57 | |||
58 | void pcm_play_pause_pause(void) | ||
59 | { | ||
60 | } | ||
61 | |||
62 | void pcm_play_pause_unpause(void) | ||
63 | { | ||
64 | } | ||
65 | |||
66 | void pcm_set_frequency(unsigned int frequency) | ||
67 | { | ||
68 | } | ||
69 | |||
70 | size_t pcm_get_bytes_waiting(void) | ||
71 | { | ||
72 | } | ||
73 | |||
74 | void pcm_mute(bool mute) | ||
75 | { | ||
76 | } | ||
77 | |||
78 | /** | ||
79 | * Return playback peaks - Peaks ahead in the DMA buffer based upon the | ||
80 | * calling period to attempt to compensate for | ||
81 | * delay. | ||
82 | */ | ||
83 | void pcm_calculate_peaks(int *left, int *right) | ||
84 | { | ||
85 | } /* pcm_calculate_peaks */ | ||
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/spi-target.h b/firmware/target/arm/tms320dm320/mrobe-500/powermgmt-mr500.c index 866919dc27..20ca4bb509 100644..100755 --- a/firmware/target/arm/tms320dm320/mrobe-500/spi-target.h +++ b/firmware/target/arm/tms320dm320/mrobe-500/powermgmt-mr500.c | |||
@@ -7,7 +7,7 @@ | |||
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id$ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2007 by Catalin Patulea | 10 | * Copyright (C) 2007 by Karl Kurbjun |
11 | * | 11 | * |
12 | * All files in this archive are subject to the GNU General Public License. | 12 | * All files in this archive are subject to the GNU General Public License. |
13 | * See the file COPYING in the source tree root for full license agreement. | 13 | * See the file COPYING in the source tree root for full license agreement. |
@@ -16,14 +16,36 @@ | |||
16 | * KIND, either express or implied. | 16 | * KIND, either express or implied. |
17 | * | 17 | * |
18 | ****************************************************************************/ | 18 | ****************************************************************************/ |
19 | |||
20 | #ifndef SPI_TARGET_H | ||
21 | #define SPI_TARGET_H | ||
22 | 19 | ||
23 | #include <inttypes.h> | 20 | #include "config.h" |
21 | #include "adc.h" | ||
22 | #include "powermgmt.h" | ||
24 | 23 | ||
25 | void spi_init(void); | 24 | const unsigned short battery_level_dangerous[BATTERY_TYPES_COUNT] = |
26 | int spi_block_transfer(const uint8_t *tx_bytes, unsigned int tx_size, | 25 | { |
27 | uint8_t *rx_bytes, unsigned int rx_size); | 26 | 3450 |
27 | }; | ||
28 | |||
29 | const unsigned short battery_level_shutoff[BATTERY_TYPES_COUNT] = | ||
30 | { | ||
31 | 3400 | ||
32 | }; | ||
33 | |||
34 | /* voltages (millivolt) of 0%, 10%, ... 100% when charging disabled */ | ||
35 | const unsigned short percent_to_volt_discharge[BATTERY_TYPES_COUNT][11] = | ||
36 | { | ||
37 | { 3480, 3550, 3590, 3610, 3630, 3650, 3700, 3760, 3800, 3910, 3990 }, | ||
38 | }; | ||
39 | |||
40 | /* voltages (millivolt) of 0%, 10%, ... 100% when charging enabled */ | ||
41 | const unsigned short percent_to_volt_charge[11] = | ||
42 | { | ||
43 | 3480, 3550, 3590, 3610, 3630, 3650, 3700, 3760, 3800, 3910, 3990 | ||
44 | }; | ||
45 | |||
46 | /* Returns battery voltage from ADC [millivolts] */ | ||
47 | unsigned int battery_adc_voltage(void) | ||
48 | { | ||
49 | return 3500; | ||
50 | } | ||
28 | 51 | ||
29 | #endif | ||
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/spi-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/spi-mr500.c deleted file mode 100644 index c47ab8f6ed..0000000000 --- a/firmware/target/arm/tms320dm320/mrobe-500/spi-mr500.c +++ /dev/null | |||
@@ -1,77 +0,0 @@ | |||
1 | /* | ||
2 | * SPI interface driver for the DM320 SoC | ||
3 | * | ||
4 | * Copyright (C) 2007 shirour <mrobefan@gmail.com> | ||
5 | * Copyright (C) 2007 Catalin Patulea <cat@vv.carleton.ca> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | * | ||
12 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
13 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
14 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
15 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
16 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
17 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
18 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
19 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
20 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
21 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License along | ||
24 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
25 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
26 | */ | ||
27 | |||
28 | #include "system.h" | ||
29 | |||
30 | #define GIO_TS_ENABLE (1<<2) | ||
31 | #define clr_gio_enable() IO_GIO_BITSET1=GIO_TS_ENABLE | ||
32 | #define set_gio_enable() IO_GIO_BITCLR1=GIO_TS_ENABLE | ||
33 | |||
34 | int spi_block_transfer(const uint8_t *tx_bytes, unsigned int tx_size, | ||
35 | uint8_t *rx_bytes, unsigned int rx_size) | ||
36 | { | ||
37 | /* Activate the slave select pin */ | ||
38 | set_gio_enable(); | ||
39 | |||
40 | while (tx_size--) | ||
41 | { | ||
42 | /* Send one byte */ | ||
43 | IO_SERIAL0_TX_DATA = *tx_bytes++; | ||
44 | |||
45 | /* Wait until transfer finished */ | ||
46 | while (IO_SERIAL0_RX_DATA & 0x100); | ||
47 | } | ||
48 | |||
49 | while (rx_size--) | ||
50 | { | ||
51 | /* Make the clock tick */ | ||
52 | IO_SERIAL0_TX_DATA = 0; | ||
53 | |||
54 | /* Wait until transfer finished */ | ||
55 | unsigned short data; | ||
56 | while ((data = IO_SERIAL0_RX_DATA) & 0x100); | ||
57 | |||
58 | *rx_bytes++ = data & 0xff; | ||
59 | } | ||
60 | |||
61 | clr_gio_enable(); | ||
62 | |||
63 | return 0; | ||
64 | } | ||
65 | |||
66 | void spi_init(void) | ||
67 | { | ||
68 | /* Set SCLK idle level = 0 */ | ||
69 | IO_SERIAL0_MODE |= (1<<10); | ||
70 | |||
71 | /* Enable TX */ | ||
72 | IO_SERIAL0_TX_ENABLE = 0x0001; | ||
73 | |||
74 | /* Set GIO 18 to output for touch screen slave enable */ | ||
75 | IO_GIO_DIR1&=~GIO_TS_ENABLE; | ||
76 | clr_gio_enable(); | ||
77 | } | ||
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/system-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/system-mr500.c deleted file mode 100644 index fad2d4331e..0000000000 --- a/firmware/target/arm/tms320dm320/mrobe-500/system-mr500.c +++ /dev/null | |||
@@ -1,210 +0,0 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2007 by Karl Kurbjun | ||
11 | * | ||
12 | * All files in this archive are subject to the GNU General Public License. | ||
13 | * See the file COPYING in the source tree root for full license agreement. | ||
14 | * | ||
15 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
16 | * KIND, either express or implied. | ||
17 | * | ||
18 | ****************************************************************************/ | ||
19 | |||
20 | #include "kernel.h" | ||
21 | #include "system.h" | ||
22 | #include "panic.h" | ||
23 | |||
24 | #define default_interrupt(name) \ | ||
25 | extern __attribute__((weak,alias("UIRQ"))) void name (void) | ||
26 | |||
27 | default_interrupt(TIMER0); | ||
28 | default_interrupt(TIMER1); | ||
29 | default_interrupt(TIMER2); | ||
30 | default_interrupt(TIMER3); | ||
31 | default_interrupt(CCD_VD0); | ||
32 | default_interrupt(CCD_VD1); | ||
33 | default_interrupt(CCD_WEN); | ||
34 | default_interrupt(VENC); | ||
35 | default_interrupt(SERIAL0); | ||
36 | default_interrupt(SERIAL1); | ||
37 | default_interrupt(EXT_HOST); | ||
38 | default_interrupt(DSPHINT); | ||
39 | default_interrupt(UART0); | ||
40 | default_interrupt(UART1); | ||
41 | default_interrupt(USB_DMA); | ||
42 | default_interrupt(USB_CORE); | ||
43 | default_interrupt(VLYNQ); | ||
44 | default_interrupt(MTC0); | ||
45 | default_interrupt(MTC1); | ||
46 | default_interrupt(SD_MMC); | ||
47 | default_interrupt(SDIO_MS); | ||
48 | default_interrupt(GIO0); | ||
49 | default_interrupt(GIO1); | ||
50 | default_interrupt(GIO2); | ||
51 | default_interrupt(GIO3); | ||
52 | default_interrupt(GIO4); | ||
53 | default_interrupt(GIO5); | ||
54 | default_interrupt(GIO6); | ||
55 | default_interrupt(GIO7); | ||
56 | default_interrupt(GIO8); | ||
57 | default_interrupt(GIO9); | ||
58 | default_interrupt(GIO10); | ||
59 | default_interrupt(GIO11); | ||
60 | default_interrupt(GIO12); | ||
61 | default_interrupt(GIO13); | ||
62 | default_interrupt(GIO14); | ||
63 | default_interrupt(GIO15); | ||
64 | default_interrupt(PREVIEW0); | ||
65 | default_interrupt(PREVIEW1); | ||
66 | default_interrupt(WATCHDOG); | ||
67 | default_interrupt(I2C); | ||
68 | default_interrupt(CLKC); | ||
69 | default_interrupt(ICE); | ||
70 | default_interrupt(ARMCOM_RX); | ||
71 | default_interrupt(ARMCOM_TX); | ||
72 | default_interrupt(RESERVED); | ||
73 | |||
74 | static void (* const irqvector[])(void) = | ||
75 | { | ||
76 | TIMER0,TIMER1,TIMER2,TIMER3,CCD_VD0,CCD_VD1, | ||
77 | CCD_WEN,VENC,SERIAL0,SERIAL1,EXT_HOST,DSPHINT, | ||
78 | UART0,UART1,USB_DMA,USB_CORE,VLYNQ,MTC0,MTC1, | ||
79 | SD_MMC,SDIO_MS,GIO0,GIO1,GIO2,GIO3,GIO4,GIO5, | ||
80 | GIO6,GIO7,GIO8,GIO9,GIO10,GIO11,GIO12,GIO13, | ||
81 | GIO14,GIO15,PREVIEW0,PREVIEW1,WATCHDOG,I2C,CLKC, | ||
82 | ICE,ARMCOM_RX,ARMCOM_TX,RESERVED | ||
83 | }; | ||
84 | |||
85 | static const char * const irqname[] = | ||
86 | { | ||
87 | "TIMER0","TIMER1","TIMER2","TIMER3","CCD_VD0","CCD_VD1", | ||
88 | "CCD_WEN","VENC","SERIAL0","SERIAL1","EXT_HOST","DSPHINT", | ||
89 | "UART0","UART1","USB_DMA","USB_CORE","VLYNQ","MTC0","MTC1", | ||
90 | "SD_MMC","SDIO_MS","GIO0","GIO1","GIO2","GIO3","GIO4","GIO5", | ||
91 | "GIO6","GIO7","GIO8","GIO9","GIO10","GIO11","GIO12","GIO13", | ||
92 | "GIO14","GIO15","PREVIEW0","PREVIEW1","WATCHDOG","I2C","CLKC", | ||
93 | "ICE","ARMCOM_RX","ARMCOM_TX","RESERVED" | ||
94 | }; | ||
95 | |||
96 | static void UIRQ(void) | ||
97 | { | ||
98 | unsigned int offset = (IO_INTC_IRQENTRY0>>2)-1; | ||
99 | panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]); | ||
100 | } | ||
101 | |||
102 | void irq_handler(void) __attribute__((interrupt ("IRQ"), naked)); | ||
103 | void irq_handler(void) | ||
104 | { | ||
105 | /* | ||
106 | * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c | ||
107 | */ | ||
108 | |||
109 | asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */ | ||
110 | "sub sp, sp, #8 \n"); /* Reserve stack */ | ||
111 | irqvector[(IO_INTC_IRQENTRY0>>2)-1](); | ||
112 | asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */ | ||
113 | "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */ | ||
114 | "subs pc, lr, #4 \n"); /* Return from FIQ */ | ||
115 | } | ||
116 | |||
117 | void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked)); | ||
118 | void fiq_handler(void) | ||
119 | { | ||
120 | /* | ||
121 | * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c | ||
122 | */ | ||
123 | |||
124 | asm volatile ( | ||
125 | "sub lr, lr, #4 \r\n" | ||
126 | "stmfd sp!, {r0-r3, ip, lr} \r\n" | ||
127 | "mov r0, #0x00030000 \r\n" | ||
128 | "ldr r0, [r0, #0x518] \r\n" | ||
129 | "ldr r1, =irqvector \r\n" | ||
130 | "ldr r1, [r1, r0, lsl #2] \r\n" | ||
131 | "mov lr, pc \r\n" | ||
132 | "bx r1 \r\n" | ||
133 | "ldmfd sp!, {r0-r3, ip, pc}^ \r\n" | ||
134 | ); | ||
135 | } | ||
136 | |||
137 | void system_reboot(void) | ||
138 | { | ||
139 | |||
140 | } | ||
141 | |||
142 | void enable_interrupts (void) | ||
143 | { | ||
144 | asm volatile ("msr cpsr_c, #0x13" ); | ||
145 | } | ||
146 | |||
147 | void system_init(void) | ||
148 | { | ||
149 | /* taken from linux/arch/arm/mach-itdm320-20/irq.c */ | ||
150 | |||
151 | /* Clearing all FIQs and IRQs. */ | ||
152 | IO_INTC_IRQ0 = 0xFFFF; | ||
153 | IO_INTC_IRQ1 = 0xFFFF; | ||
154 | IO_INTC_IRQ2 = 0xFFFF; | ||
155 | |||
156 | IO_INTC_FIQ0 = 0xFFFF; | ||
157 | IO_INTC_FIQ1 = 0xFFFF; | ||
158 | IO_INTC_FIQ2 = 0xFFFF; | ||
159 | |||
160 | /* Masking all Interrupts. */ | ||
161 | IO_INTC_EINT0 = 0; | ||
162 | IO_INTC_EINT1 = 0; | ||
163 | IO_INTC_EINT2 = 0; | ||
164 | |||
165 | /* Setting INTC to all IRQs. */ | ||
166 | IO_INTC_FISEL0 = 0; | ||
167 | IO_INTC_FISEL1 = 0; | ||
168 | IO_INTC_FISEL2 = 0; | ||
169 | |||
170 | IO_INTC_ENTRY_TBA0 = | ||
171 | IO_INTC_ENTRY_TBA1 = 0; | ||
172 | |||
173 | /* set GIO26 (reset pin) to output and low */ | ||
174 | IO_GIO_BITCLR1=(1<<10); | ||
175 | IO_GIO_DIR1&=~(1<<10); | ||
176 | |||
177 | enable_interrupts(); | ||
178 | } | ||
179 | |||
180 | int system_memory_guard(int newmode) | ||
181 | { | ||
182 | (void)newmode; | ||
183 | return 0; | ||
184 | } | ||
185 | |||
186 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ | ||
187 | |||
188 | void set_cpu_frequency(long frequency) | ||
189 | { | ||
190 | if (frequency == CPUFREQ_MAX) | ||
191 | { | ||
192 | asm volatile("mov r0, #0\n" | ||
193 | "mrc p15, 0, r0, c1, c0, 0\n" | ||
194 | "orr r0, r0, #3<<30\n" /* set to Asynchronous mode*/ | ||
195 | "mcr p15, 0, r0, c1, c0, 0" : : : "r0"); | ||
196 | |||
197 | FREQ = CPUFREQ_MAX; | ||
198 | } | ||
199 | else | ||
200 | { | ||
201 | asm volatile("mov r0, #0\n" | ||
202 | "mrc p15, 0, r0, c1, c0, 0\n" | ||
203 | "bic r0, r0, #3<<30\n" /* set to FastBus mode*/ | ||
204 | "mcr p15, 0, r0, c1, c0, 0" : : : "r0"); | ||
205 | |||
206 | FREQ = CPUFREQ_NORMAL; | ||
207 | } | ||
208 | } | ||
209 | |||
210 | #endif | ||
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/timer-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/timer-mr500.c deleted file mode 100644 index 21449ed19f..0000000000 --- a/firmware/target/arm/tms320dm320/mrobe-500/timer-mr500.c +++ /dev/null | |||
@@ -1,106 +0,0 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2007 by Karl Kurbjun | ||
11 | * | ||
12 | * All files in this archive are subject to the GNU General Public License. | ||
13 | * See the file COPYING in the source tree root for full license agreement. | ||
14 | * | ||
15 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
16 | * KIND, either express or implied. | ||
17 | * | ||
18 | ****************************************************************************/ | ||
19 | |||
20 | #include "config.h" | ||
21 | #include "cpu.h" | ||
22 | #include "system.h" | ||
23 | #include "timer.h" | ||
24 | #include "logf.h" | ||
25 | |||
26 | /* GPB0/TOUT0 should already have been configured as output so that pin | ||
27 | should not be a functional pin and TIMER0 output unseen there */ | ||
28 | void TIMER0(void) | ||
29 | { | ||
30 | if (pfn_timer != NULL) | ||
31 | pfn_timer(); | ||
32 | IO_INTC_IRQ0 |= 1<<IRQ_TIMER0; | ||
33 | } | ||
34 | |||
35 | static void stop_timer(void) | ||
36 | { | ||
37 | IO_INTC_EINT0 &= ~(1<<IRQ_TIMER0); | ||
38 | |||
39 | IO_INTC_IRQ0 |= 1<<IRQ_TIMER0; | ||
40 | |||
41 | IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP; | ||
42 | } | ||
43 | |||
44 | bool __timer_set(long cycles, bool start) | ||
45 | { | ||
46 | int oldlevel; | ||
47 | unsigned int divider; | ||
48 | /* taken from linux/arch/arm/mach-itdm320-20/time.c and timer-meg-fx.c */ | ||
49 | |||
50 | /* Turn off all timers */ | ||
51 | IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP; | ||
52 | IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_STOP; | ||
53 | IO_TIMER2_TMMD = CONFIG_TIMER2_TMMD_STOP; | ||
54 | IO_TIMER3_TMMD = CONFIG_TIMER3_TMMD_STOP; | ||
55 | |||
56 | /* Find the minimum factor that puts the counter in range 1-65535 */ | ||
57 | unsigned int prescaler = (cycles + 65534) / 65535; | ||
58 | |||
59 | /* Test this by writing 1's to registers to see how many bits we have */ | ||
60 | /* Maximum divider setting is x / 1024 / 65536 = x / 67108864 */ | ||
61 | if (start && pfn_unregister != NULL) | ||
62 | { | ||
63 | pfn_unregister(); | ||
64 | pfn_unregister = NULL; | ||
65 | } | ||
66 | |||
67 | oldlevel = set_irq_level(HIGHEST_IRQ_LEVEL); | ||
68 | |||
69 | /* Max prescale is 1023+1 */ | ||
70 | for (divider = 0; prescaler > 1024; prescaler >>= 1, divider++); | ||
71 | |||
72 | /* Setup the Prescalar */ | ||
73 | IO_TIMER0_TMPRSCL = prescaler; | ||
74 | |||
75 | /* Setup the Divisor */ | ||
76 | IO_TIMER0_TMDIV = divider; | ||
77 | |||
78 | set_irq_level(oldlevel); | ||
79 | |||
80 | return true; | ||
81 | } | ||
82 | |||
83 | bool __timer_register(void) | ||
84 | { | ||
85 | bool retval = true; | ||
86 | |||
87 | int oldstatus = set_interrupt_status(IRQ_FIQ_DISABLED, IRQ_FIQ_STATUS); | ||
88 | |||
89 | stop_timer(); | ||
90 | |||
91 | /* Turn Timer0 to Free Run mode */ | ||
92 | IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_FREE_RUN; | ||
93 | |||
94 | IO_INTC_EINT0 |= 1<<IRQ_TIMER0; | ||
95 | |||
96 | set_interrupt_status(oldstatus, IRQ_FIQ_STATUS); | ||
97 | |||
98 | return retval; | ||
99 | } | ||
100 | |||
101 | void __timer_unregister(void) | ||
102 | { | ||
103 | int oldstatus = set_interrupt_status(IRQ_FIQ_DISABLED, IRQ_FIQ_STATUS); | ||
104 | stop_timer(); | ||
105 | set_interrupt_status(oldstatus, IRQ_FIQ_STATUS); | ||
106 | } | ||
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/timer-target.h b/firmware/target/arm/tms320dm320/mrobe-500/timer-target.h deleted file mode 100644 index 4abe75ad82..0000000000 --- a/firmware/target/arm/tms320dm320/mrobe-500/timer-target.h +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2007 by Karl Kurbjun | ||
11 | * | ||
12 | * All files in this archive are subject to the GNU General Public License. | ||
13 | * See the file COPYING in the source tree root for full license agreement. | ||
14 | * | ||
15 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
16 | * KIND, either express or implied. | ||
17 | * | ||
18 | ****************************************************************************/ | ||
19 | #ifndef TIMER_TARGET_H | ||
20 | #define TIMER_TARGET_H | ||
21 | |||
22 | /* timer is based on PCLK and minimum division is 2 */ | ||
23 | #define TIMER_FREQ (27000000) | ||
24 | |||
25 | bool __timer_set(long cycles, bool set); | ||
26 | bool __timer_register(void); | ||
27 | void __timer_unregister(void); | ||
28 | |||
29 | #define __TIMER_SET(cycles, set) \ | ||
30 | __timer_set(cycles, set) | ||
31 | |||
32 | #define __TIMER_REGISTER(reg_prio, unregister_callback, cycles, \ | ||
33 | int_prio, timer_callback) \ | ||
34 | __timer_register() | ||
35 | |||
36 | #define __TIMER_UNREGISTER(...) \ | ||
37 | __timer_unregister() | ||
38 | |||
39 | #endif /* TIMER_TARGET_H */ | ||
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/uart-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/uart-mr500.c deleted file mode 100644 index 66e59eaaac..0000000000 --- a/firmware/target/arm/tms320dm320/mrobe-500/uart-mr500.c +++ /dev/null | |||
@@ -1,172 +0,0 @@ | |||
1 | /* | ||
2 | * (C) Copyright 2007 Catalin Patulea <cat@vv.carleton.ca> | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License as | ||
6 | * published by the Free Software Foundation; either version 2 of | ||
7 | * the License, or (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | ||
17 | * MA 02111-1307 USA | ||
18 | * | ||
19 | */ | ||
20 | #include "config.h" | ||
21 | #include "cpu.h" | ||
22 | #include "system.h" | ||
23 | |||
24 | /* UART 0/1 */ | ||
25 | |||
26 | #define CONFIG_UART_BRSR 87 | ||
27 | #define MAX_UART_BUFFER 32 | ||
28 | static unsigned char uart1buffer[MAX_UART_BUFFER]; | ||
29 | int uart1read = 0, uart1write = 0, uart1count = 0; | ||
30 | |||
31 | void do_checksums(char *data, int len, char *xor, char *add) | ||
32 | { | ||
33 | int i; | ||
34 | *xor = data[0]; | ||
35 | *add = data[0]; | ||
36 | for(i=1;i<len;i++) | ||
37 | { | ||
38 | *xor ^= data[i]; | ||
39 | *add += data[i]; | ||
40 | } | ||
41 | } | ||
42 | |||
43 | void uart_init(void) | ||
44 | { | ||
45 | // 8-N-1 | ||
46 | IO_UART1_MSR=0x8000; | ||
47 | IO_UART1_BRSR=CONFIG_UART_BRSR; | ||
48 | IO_UART1_RFCR = 0x8000; | ||
49 | /* gio 27 is input, uart1 rx | ||
50 | gio 28 is output, uart1 tx */ | ||
51 | IO_GIO_DIR1 |= (1<<11); /* gio 27 */ | ||
52 | IO_GIO_DIR1 &= ~(1<<12); /* gio 28 */ | ||
53 | |||
54 | /* init the recieve buffer */ | ||
55 | uart1read = 0; | ||
56 | uart1write = 0; | ||
57 | uart1count = 0; | ||
58 | |||
59 | /* Enable the interrupt */ | ||
60 | IO_INTC_EINT0 |= (1<<IRQ_UART1); | ||
61 | } | ||
62 | |||
63 | void uartPutc(char ch) { | ||
64 | // Wait for room in FIFO | ||
65 | while ((IO_UART1_TFCR & 0x3f) >= 0x20); | ||
66 | |||
67 | // Write character | ||
68 | IO_UART1_DTRR=ch; | ||
69 | } | ||
70 | |||
71 | // Unsigned integer to ASCII hexadecimal conversion | ||
72 | void uartPutHex(unsigned int n) { | ||
73 | unsigned int i; | ||
74 | |||
75 | for (i = 8; i != 0; i--) { | ||
76 | unsigned int digit = n >> 28; | ||
77 | uartPutc(digit >= 10 ? digit - 10 + 'A' : digit + '0'); | ||
78 | n <<= 4; | ||
79 | } | ||
80 | } | ||
81 | |||
82 | void uartPuts(const char *str) { | ||
83 | char ch; | ||
84 | while ((ch = *str++) != '\0') { | ||
85 | uartPutc(ch); | ||
86 | } | ||
87 | } | ||
88 | |||
89 | void uartGets(char *str, unsigned int size) { | ||
90 | for (;;) { | ||
91 | char ch; | ||
92 | |||
93 | // Wait for FIFO to contain something | ||
94 | while ((IO_UART1_RFCR & 0x3f) == 0); | ||
95 | |||
96 | // Read character | ||
97 | ch = (char)IO_UART1_DTRR; | ||
98 | |||
99 | // Echo character back | ||
100 | IO_UART1_DTRR=ch; | ||
101 | |||
102 | // If CR, also echo LF, null-terminate, and return | ||
103 | if (ch == '\r') { | ||
104 | IO_UART1_DTRR='\n'; | ||
105 | if (size) { | ||
106 | *str++ = '\0'; | ||
107 | } | ||
108 | return; | ||
109 | } | ||
110 | |||
111 | // Append to buffer | ||
112 | if (size) { | ||
113 | *str++ = ch; | ||
114 | --size; | ||
115 | } | ||
116 | } | ||
117 | } | ||
118 | |||
119 | int uartPollch(unsigned int ticks) { | ||
120 | while (ticks--) { | ||
121 | if (IO_UART1_RFCR & 0x3f) { | ||
122 | return IO_UART1_DTRR & 0xff; | ||
123 | } | ||
124 | } | ||
125 | |||
126 | return -1; | ||
127 | } | ||
128 | |||
129 | bool uartAvailable(void) | ||
130 | { | ||
131 | return uart1count > 0; | ||
132 | } | ||
133 | |||
134 | void uart1_heartbeat(void) | ||
135 | { | ||
136 | char data[5] = {0x11, 0x30, 0x11^0x30, 0x11+0x30, '\0'}; | ||
137 | uartPuts(data); | ||
138 | } | ||
139 | |||
140 | void uartSendData(char* data, int len) | ||
141 | { | ||
142 | int i; | ||
143 | for(i=0;i<len;i++) | ||
144 | uartPutc(data[i]); | ||
145 | } | ||
146 | |||
147 | bool uart1_getch(char *c) | ||
148 | { | ||
149 | if (uart1count > 0) | ||
150 | { | ||
151 | *c = uart1buffer[uart1read]; | ||
152 | uart1read = (uart1read+1) % MAX_UART_BUFFER; | ||
153 | uart1count--; | ||
154 | return true; | ||
155 | } | ||
156 | return false; | ||
157 | } | ||
158 | |||
159 | /* UART1 receive intterupt handler */ | ||
160 | void UART1(void) | ||
161 | { | ||
162 | if (IO_UART1_RFCR & 0x3f) | ||
163 | { | ||
164 | if (uart1count >= MAX_UART_BUFFER) | ||
165 | panicf("UART1 buffer overflow"); | ||
166 | uart1buffer[uart1write] = IO_UART1_DTRR & 0xff; | ||
167 | uart1write = (uart1write+1) % MAX_UART_BUFFER; | ||
168 | uart1count++; | ||
169 | } | ||
170 | |||
171 | IO_INTC_IRQ0 = (1<<IRQ_UART1); | ||
172 | } | ||
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/uart-target.h b/firmware/target/arm/tms320dm320/mrobe-500/uart-target.h deleted file mode 100644 index f077dc1025..0000000000 --- a/firmware/target/arm/tms320dm320/mrobe-500/uart-target.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * (C) Copyright 2007 Catalin Patulea <cat@vv.carleton.ca> | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License as | ||
6 | * published by the Free Software Foundation; either version 2 of | ||
7 | * the License, or (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | ||
17 | * MA 02111-1307 USA | ||
18 | * | ||
19 | */ | ||
20 | #ifndef UART_H | ||
21 | #define UART_H | ||
22 | |||
23 | void uart_init(void); | ||
24 | bool uart1_getch(char *c); | ||
25 | void uart1_heartbeat(void); | ||
26 | |||
27 | void uartPuts(const char *str); | ||
28 | void uartGets(char *str, unsigned int size); | ||
29 | int uartPollch(unsigned int ticks); | ||
30 | void uartPutc(char ch); | ||
31 | void uartPutHex(unsigned int n); | ||
32 | |||
33 | #endif | ||