diff options
Diffstat (limited to 'firmware/target/arm/system-pp502x.c')
-rw-r--r-- | firmware/target/arm/system-pp502x.c | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/firmware/target/arm/system-pp502x.c b/firmware/target/arm/system-pp502x.c index 658ea0eeb3..4542913d53 100644 --- a/firmware/target/arm/system-pp502x.c +++ b/firmware/target/arm/system-pp502x.c | |||
@@ -152,6 +152,7 @@ static void ipod_init_cache(void) | |||
152 | void set_cpu_frequency(long frequency) | 152 | void set_cpu_frequency(long frequency) |
153 | { | 153 | { |
154 | unsigned long postmult, pll_control; | 154 | unsigned long postmult, pll_control; |
155 | unsigned long unknown1, unknown2; | ||
155 | 156 | ||
156 | # if NUM_CORES > 1 | 157 | # if NUM_CORES > 1 |
157 | /* Using mutex or spinlock isn't safe here. */ | 158 | /* Using mutex or spinlock isn't safe here. */ |
@@ -166,17 +167,25 @@ void set_cpu_frequency(long frequency) | |||
166 | postmult = CPUFREQ_DEFAULT_MULT; | 167 | postmult = CPUFREQ_DEFAULT_MULT; |
167 | cpu_frequency = frequency; | 168 | cpu_frequency = frequency; |
168 | 169 | ||
169 | /* Enable PLL? */ | 170 | unknown2 = inl(0x600060a0); |
170 | outl(inl(0x70000020) | (1<<30), 0x70000020); | ||
171 | 171 | ||
172 | /* Select 24MHz crystal as clock source? */ | 172 | outl(inl(0x70000020) | (1<<30), 0x70000020); /* Enable PLL power */ |
173 | |||
174 | /* Set clock source #1 to 24MHz and select it */ | ||
173 | outl((inl(0x60006020) & 0x0ffffff0) | 0x10000002, 0x60006020); | 175 | outl((inl(0x60006020) & 0x0ffffff0) | 0x10000002, 0x60006020); |
176 | |||
177 | outl(unknown2 & 0x3fffffff, 0x600060a0); | ||
178 | |||
179 | unknown1 = (138 * postmult + 255) >> 8; | ||
180 | if (unknown1 > 15) | ||
181 | unknown1 = 15; | ||
182 | outl((unknown1 << 8) | unknown1, 0x70000034); | ||
174 | 183 | ||
175 | /* Clock frequency = (24/8)*postmult */ | 184 | /* PLL frequency = (24/4)*postmult */ |
176 | pll_control = 0x8a020000 | 8 | (postmult << 8); | 185 | pll_control = 0x8a020000 | 4 | (postmult << 8); |
177 | outl(pll_control, 0x60006034); | 186 | outl(pll_control, 0x60006034); |
178 | # if CONFIG_CPU == PP5020 | 187 | # if CONFIG_CPU == PP5020 |
179 | outl(0xd198, 0x6000603c); /* magic sequence */ | 188 | outl(0xd19b, 0x6000603c); /* magic sequence */ |
180 | outl(pll_control, 0x60006034); | 189 | outl(pll_control, 0x60006034); |
181 | udelay(500); /* wait for relock */ | 190 | udelay(500); /* wait for relock */ |
182 | # else /* PP5022, PP5024 */ | 191 | # else /* PP5022, PP5024 */ |
@@ -186,6 +195,8 @@ void set_cpu_frequency(long frequency) | |||
186 | /* Select PLL as clock source? */ | 195 | /* Select PLL as clock source? */ |
187 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); | 196 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); |
188 | 197 | ||
198 | outl(unknown2, 0x600060a0); | ||
199 | |||
189 | # if NUM_CORES > 1 | 200 | # if NUM_CORES > 1 |
190 | boostctrl_mtx.locked = 0; | 201 | boostctrl_mtx.locked = 0; |
191 | # endif | 202 | # endif |
@@ -199,7 +210,7 @@ void ipod_set_cpu_frequency(void) | |||
199 | outl(inl(0x70000020) | (1<<30), 0x70000020); | 210 | outl(inl(0x70000020) | (1<<30), 0x70000020); |
200 | 211 | ||
201 | /* Select 24MHz crystal as clock source? */ | 212 | /* Select 24MHz crystal as clock source? */ |
202 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020); | 213 | outl((inl(0x60006020) & 0x0ffffff0) | 0x10000002, 0x60006020); |
203 | 214 | ||
204 | /* Clock frequency = (24/8)*25 = 75MHz */ | 215 | /* Clock frequency = (24/8)*25 = 75MHz */ |
205 | outl(0x8a020000 | 8 | (25 << 8), 0x60006034); | 216 | outl(0x8a020000 | 8 | (25 << 8), 0x60006034); |