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Diffstat (limited to 'firmware/target/arm/system-pp502x.c')
-rw-r--r--firmware/target/arm/system-pp502x.c54
1 files changed, 41 insertions, 13 deletions
diff --git a/firmware/target/arm/system-pp502x.c b/firmware/target/arm/system-pp502x.c
index c84c9ce7a1..6f556c07cc 100644
--- a/firmware/target/arm/system-pp502x.c
+++ b/firmware/target/arm/system-pp502x.c
@@ -70,9 +70,7 @@ void irq(void)
70 } 70 }
71#endif 71#endif
72 } else { 72 } else {
73 if (COP_INT_STAT & TIMER1_MASK) 73 if (COP_INT_STAT & TIMER2_MASK)
74 TIMER1();
75 else if (COP_INT_STAT & TIMER2_MASK)
76 TIMER2(); 74 TIMER2();
77 } 75 }
78} 76}
@@ -85,25 +83,49 @@ void irq(void)
85 to extend the funtions to do alternate cache configurations. */ 83 to extend the funtions to do alternate cache configurations. */
86 84
87#ifndef BOOTLOADER 85#ifndef BOOTLOADER
88static void ipod_init_cache(void) 86void flush_icache(void) ICODE_ATTR;
87void flush_icache(void)
88{
89 if (CACHE_CTL & CACHE_ENABLE)
90 {
91 outl(inl(0xf000f044) | 0x2, 0xf000f044);
92 while ((CACHE_CTL & 0x8000) != 0);
93 }
94}
95
96void invalidate_icache(void) ICODE_ATTR;
97void invalidate_icache(void)
98{
99 if (CACHE_CTL & CACHE_ENABLE)
100 {
101 unsigned i;
102 outl(inl(0xf000f044) | 0x6, 0xf000f044);
103 while ((CACHE_CTL & 0x8000) != 0);
104 for (i = 0x10000000; i < 0x10002000; i += 16)
105 inb(i);
106 }
107}
108
109static void init_cache(void)
89{ 110{
90/* Initialising the cache in the iPod bootloader prevents Rockbox from starting */ 111/* Initialising the cache in the iPod bootloader prevents Rockbox from starting */
91 unsigned i; 112 unsigned i;
92 113
93 /* cache init mode? */ 114 /* cache init mode? */
94 CACHE_CTL = CACHE_INIT; 115 CACHE_CTL |= CACHE_INIT;
95 116
96 /* PP5002 has 8KB cache */ 117 /* what's this do? */
97 for (i = 0xf0004000; i < 0xf0006000; i += 16) { 118 outl(inl(0x60006044) | (CURRENT_CORE == CPU ? 0x10 : 0x20),
98 outl(0x0, i); 119 0x60006044);
99 }
100 120
101 outl(0x0, 0xf000f040); 121 outl(0xc00, 0xf000f040);
102 outl(0x3fc0, 0xf000f044); 122 outl(0xfc0, 0xf000f044);
103 123
104 /* enable cache */ 124 /* enable cache */
105 CACHE_CTL = CACHE_ENABLE; 125 CACHE_CTL |= CACHE_INIT | CACHE_ENABLE | CACHE_RUN;
106 126
127 /* fill cache from physical address - do we have a better candidate for
128 an 8KB unchanging memory range? */
107 for (i = 0x10000000; i < 0x10002000; i += 16) 129 for (i = 0x10000000; i < 0x10002000; i += 16)
108 inb(i); 130 inb(i);
109} 131}
@@ -206,6 +228,12 @@ void system_init(void)
206 outl(0xffffffff, 0x60006008); 228 outl(0xffffffff, 0x60006008);
207 DEV_RS = 0; 229 DEV_RS = 0;
208 outl(0x00000000, 0x60006008); 230 outl(0x00000000, 0x60006008);
231#elif defined (IRIVER_H10)
232 DEV_RS = 0x3ffffef8;
233 outl(0xffffffff, 0x60006008);
234 outl(inl(0x70000024) | 0xc0, 0x70000024);
235 DEV_RS = 0;
236 outl(0x00000000, 0x60006008);
209#endif 237#endif
210 /* Remap the flash ROM from 0x00000000 to 0x20000000. */ 238 /* Remap the flash ROM from 0x00000000 to 0x20000000. */
211 MMAP3_LOGICAL = 0x20000000 | 0x3a00; 239 MMAP3_LOGICAL = 0x20000000 | 0x3a00;
@@ -248,8 +276,8 @@ void system_init(void)
248 pp_set_cpu_frequency(CPUFREQ_MAX); 276 pp_set_cpu_frequency(CPUFREQ_MAX);
249#endif 277#endif
250 } 278 }
251 ipod_init_cache();
252 279
280 init_cache();
253#endif /* BOOTLOADER */ 281#endif /* BOOTLOADER */
254} 282}
255 283