summaryrefslogtreecommitdiff
path: root/firmware/target/arm/sandisk
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/target/arm/sandisk')
-rw-r--r--firmware/target/arm/sandisk/app.lds193
-rw-r--r--firmware/target/arm/sandisk/boot.lds77
2 files changed, 3 insertions, 267 deletions
diff --git a/firmware/target/arm/sandisk/app.lds b/firmware/target/arm/sandisk/app.lds
index a4b68ba994..856cc52bb0 100644
--- a/firmware/target/arm/sandisk/app.lds
+++ b/firmware/target/arm/sandisk/app.lds
@@ -1,193 +1,2 @@
1#include "config.h" 1#include "config.h"
2 2#include "../pp/app-pp.lds"
3ENTRY(start)
4
5OUTPUT_FORMAT(elf32-littlearm)
6OUTPUT_ARCH(arm)
7STARTUP(target/arm/pp/crt0-pp.o)
8
9#define PLUGINSIZE PLUGIN_BUFFER_SIZE
10#define CODECSIZE CODEC_SIZE
11
12#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - CODECSIZE
13
14#define DRAMORIG 0x00000000
15#define IRAMORIG 0x40000000
16#define IRAMSIZE 0xc000
17
18#ifdef CPU_PP502x
19#define NOCACHE_BASE 0x10000000
20#else
21#define NOCACHE_BASE 0x28000000
22#endif
23
24#define CACHEALIGN_SIZE 16
25
26/* End of the audio buffer, where the codec buffer starts */
27#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE)
28
29/* Where the codec buffer ends, and the plugin buffer starts */
30#define ENDADDR (ENDAUDIOADDR + CODECSIZE)
31
32MEMORY
33{
34 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
35 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
36}
37
38SECTIONS
39{
40 .text :
41 {
42 loadaddress = .;
43 _loadaddress = .;
44 . = ALIGN(0x200);
45 *(.init.text)
46 *(.text*)
47 *(.glue_7)
48 *(.glue_7t)
49 . = ALIGN(0x4);
50 } > DRAM
51
52 .rodata :
53 {
54 *(.rodata*)
55 . = ALIGN(0x4);
56 } > DRAM
57
58 .data :
59 {
60 *(.data*)
61 . = ALIGN(0x4);
62 } > DRAM
63
64#if NOCACHE_BASE != 0
65 /* .ncdata section is placed at uncached physical alias address and is
66 * loaded at the proper cached virtual address - no copying is
67 * performed in the init code */
68 .ncdata . + NOCACHE_BASE :
69 {
70 . = ALIGN(CACHEALIGN_SIZE);
71 *(.ncdata*)
72 . = ALIGN(CACHEALIGN_SIZE);
73 } AT> DRAM
74#endif
75
76 /DISCARD/ :
77 {
78 *(.eh_frame)
79 }
80
81 .vectors 0x0 :
82 {
83 _vectorsstart = .;
84 KEEP(*(.vectors));
85 _vectorsend = .;
86 } AT> DRAM
87
88 _vectorscopy = LOADADDR(.vectors);
89 _noloaddram = LOADADDR(.vectors);
90
91 .ibss IRAMORIG (NOLOAD) :
92 {
93 _iedata = .;
94 *(.qharray)
95 *(.ibss*)
96 . = ALIGN(0x4);
97 _iend = .;
98 } > IRAM
99
100 .iram _iend :
101 {
102 _iramstart = .;
103 *(.icode*)
104 *(.irodata*)
105 *(.idata*)
106 . = ALIGN(0x4);
107 _iramend = .;
108 } > IRAM AT> DRAM
109
110 _iramcopy = LOADADDR(.iram);
111
112
113 .init ENDAUDIOADDR :
114 {
115 . = ALIGN(4);
116 _initstart = .;
117 *(.init*)
118 _initend = .;
119 } AT> DRAM
120
121 _initcopy = LOADADDR(.init);
122
123 .idle_stacks (NOLOAD) :
124 {
125 *(.idle_stacks)
126#if NUM_CORES > 1
127 cpu_idlestackbegin = .;
128 . += IDLE_STACK_SIZE;
129 cpu_idlestackend = .;
130#endif
131 cop_idlestackbegin = .;
132 . += IDLE_STACK_SIZE;
133 cop_idlestackend = .;
134 } > IRAM
135
136 .stack (NOLOAD) :
137 {
138 *(.stack)
139 stackbegin = .;
140 . += 0x2000;
141 stackend = .;
142 } > IRAM
143
144 /* .bss and .ncbss are treated as a single section to use one init loop to
145 * zero it - note "_edata" and "_end" */
146 .bss _noloaddram (NOLOAD) :
147 {
148 _edata = .;
149 *(.bss*)
150 *(COMMON)
151 . = ALIGN(0x4);
152 } > DRAM
153
154#if NOCACHE_BASE != 0
155 .ncbss . + NOCACHE_BASE (NOLOAD):
156 {
157 . = ALIGN(CACHEALIGN_SIZE);
158 *(.ncbss*)
159 . = ALIGN(CACHEALIGN_SIZE);
160 } AT> DRAM
161#endif
162
163 /* This will be aligned by preceding alignments */
164 .endaddr . - NOCACHE_BASE (NOLOAD) :
165 {
166 _end = .;
167 } > DRAM
168
169 .audiobuf (NOLOAD) :
170 {
171 _audiobuffer = .;
172 . = ALIGN(0x4);
173 audiobuffer = .;
174 } > DRAM
175
176 .audiobufend ENDAUDIOADDR (NOLOAD) :
177 {
178 audiobufend = .;
179 _audiobufend = .;
180 } > DRAM
181
182 .codec ENDAUDIOADDR (NOLOAD) :
183 {
184 codecbuf = .;
185 _codecbuf = .;
186 }
187
188 .plugin ENDADDR (NOLOAD) :
189 {
190 _pluginbuf = .;
191 pluginbuf = .;
192 }
193}
diff --git a/firmware/target/arm/sandisk/boot.lds b/firmware/target/arm/sandisk/boot.lds
index a4ea28ab8c..4586c09e20 100644
--- a/firmware/target/arm/sandisk/boot.lds
+++ b/firmware/target/arm/sandisk/boot.lds
@@ -3,79 +3,6 @@
3/* Can't link all Sansa PP devices the same way at this time */ 3/* Can't link all Sansa PP devices the same way at this time */
4#ifdef HAVE_BOOTLOADER_USB_MODE 4#ifdef HAVE_BOOTLOADER_USB_MODE
5#include "../pp/boot-pp502x-bl-usb.lds" 5#include "../pp/boot-pp502x-bl-usb.lds"
6#else /* !HAVE_BOOTLOADER_USB_MODE */
7
8ENTRY(start)
9OUTPUT_FORMAT(elf32-littlearm)
10OUTPUT_ARCH(arm)
11STARTUP(target/arm/pp/crt0-pp-bl.o)
12
13#define DRAMSIZE (MEMORYSIZE * 0x100000)
14
15#ifdef SANSA_VIEW
16#define DRAMORIG 0x10f00000
17#else
18#define DRAMORIG 0x10000000
19#endif
20
21#ifndef IRAMORIG
22#define IRAMORIG 0x40000000
23#endif
24#define IRAMSIZE 0x20000
25#define FLASHORIG 0x001f0000
26#define FLASHSIZE 2M
27
28MEMORY
29{
30 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
31 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
32}
33
34SECTIONS
35{
36#ifdef SANSA_PP_ERASE
37 . = IRAMORIG+0x4000;
38#else 6#else
39 . = IRAMORIG; 7#include "../pp/boot-pp.lds"
40#endif 8#endif \ No newline at end of file
41
42 .text : {
43 *(.init.text)
44 *(.text*)
45 *(.glue_7)
46 *(.glue_7t)
47 } > IRAM
48
49 .data : {
50 *(.icode)
51 *(.irodata)
52 *(.idata)
53 *(.data*)
54 *(.ncdata*)
55 *(.rodata*)
56 _dataend = . ;
57 } > IRAM
58
59 .stack (NOLOAD) : {
60 *(.stack)
61 _stackbegin = .;
62 stackbegin = .;
63 . += 0x2000;
64 _stackend = .;
65 stackend = .;
66 } > IRAM
67
68 /* The bss section is too large for IRAM - we just move it 16MB into the
69 DRAM */
70
71 . = DRAMORIG;
72 .bss . + (16*1024*1024) (NOLOAD) : {
73 _edata = .;
74 *(.bss*);
75 *(.ibss);
76 *(COMMON)
77 *(.ncbss*);
78 _end = .;
79 } > DRAM
80}
81#endif /* HAVE_BOOTLOADER_USB_MODE */