diff options
Diffstat (limited to 'firmware/target/arm/sandisk/sansa-e200')
-rw-r--r-- | firmware/target/arm/sandisk/sansa-e200/ata-e200.c | 6 | ||||
-rw-r--r-- | firmware/target/arm/sandisk/sansa-e200/lcd-e200.c | 8 |
2 files changed, 7 insertions, 7 deletions
diff --git a/firmware/target/arm/sandisk/sansa-e200/ata-e200.c b/firmware/target/arm/sandisk/sansa-e200/ata-e200.c index 56f351c001..cf05397a78 100644 --- a/firmware/target/arm/sandisk/sansa-e200/ata-e200.c +++ b/firmware/target/arm/sandisk/sansa-e200/ata-e200.c | |||
@@ -364,9 +364,9 @@ void sd_init_device(void) | |||
364 | GPIOD_ENABLE |= (0x1f); | 364 | GPIOD_ENABLE |= (0x1f); |
365 | GPIOD_OUTPUT_EN |= (0x1f); | 365 | GPIOD_OUTPUT_EN |= (0x1f); |
366 | GPIOD_OUTPUT_VAL |= (0x1f); | 366 | GPIOD_OUTPUT_VAL |= (0x1f); |
367 | outl(inl(0x6000600c) | (1 << 14), 0x6000600c); | 367 | DEV_EN |= (1 << 14); /* Enable controller */ |
368 | outl(inl(0x60006004) | (1 << 14), 0x60006004); | 368 | DEV_RS |= (1 << 14); /* Reset controller */ |
369 | outl(inl(0x60006004) & ~(1 << 14), 0x60006004); /* Reset Controller? */ | 369 | DEV_RS &=~(1 << 14); /* Clear Reset */ |
370 | outl(0, 0x6000b000); | 370 | outl(0, 0x6000b000); |
371 | outl(0, 0x6000a000); /* Init DMA controller? */ | 371 | outl(0, 0x6000a000); /* Init DMA controller? */ |
372 | 372 | ||
diff --git a/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c b/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c index 25bb6f04aa..e34ebd7c5a 100644 --- a/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c +++ b/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c | |||
@@ -110,7 +110,7 @@ static inline void cache_flush(void) | |||
110 | { | 110 | { |
111 | #ifndef BOOTLOADER | 111 | #ifndef BOOTLOADER |
112 | outl(inl(0xf000f044) | 0x2, 0xf000f044); | 112 | outl(inl(0xf000f044) | 0x2, 0xf000f044); |
113 | while ((inl(0x6000c000) & 0x8000) != 0) | 113 | while ((CACHE_CTL & 0x8000) != 0) |
114 | { | 114 | { |
115 | } | 115 | } |
116 | #endif | 116 | #endif |
@@ -141,12 +141,12 @@ inline void lcd_init_device(void) | |||
141 | outl(((inl(0x70000010) & (0x03ffffff)) | (0x15 << 26)), 0x70000010); | 141 | outl(((inl(0x70000010) & (0x03ffffff)) | (0x15 << 26)), 0x70000010); |
142 | outl(((inl(0x70000014) & (0x0fffffff)) | (0x5 << 28)), 0x70000014); | 142 | outl(((inl(0x70000014) & (0x0fffffff)) | (0x5 << 28)), 0x70000014); |
143 | outl((inl(0x70000020) & ~(0x3 << 10)), 0x70000020); | 143 | outl((inl(0x70000020) & ~(0x3 << 10)), 0x70000020); |
144 | outl((inl(0x6000600c) | (1 << 26)), 0x6000600c); /* Enable controller */ | 144 | DEV_EN |= (1 << 26); /* Enable controller */ |
145 | outl(0x6, 0x600060d0); | 145 | outl(0x6, 0x600060d0); |
146 | outl((inl(0x60006004) | (1 << 26)), 0x60006004); /* Reset controller? */ | 146 | DEV_RS |= (1 << 26); /* Reset controller */ |
147 | outl((inl(0x70000020) & ~(1 << 14)), 0x70000020); | 147 | outl((inl(0x70000020) & ~(1 << 14)), 0x70000020); |
148 | lcd_bus_idle(); | 148 | lcd_bus_idle(); |
149 | outl((inl(0x60006004) & ~(1 << 26)), 0x60006004); /* Clear reset? */ | 149 | DEV_RS &=~(1 << 26); /* Clear reset */ |
150 | udelay(1000); | 150 | udelay(1000); |
151 | 151 | ||
152 | LCD_REG_0 = (LCD_REG_0 & (0x00ffffff)) | (0x22 << 24); | 152 | LCD_REG_0 = (LCD_REG_0 & (0x00ffffff)) | (0x22 << 24); |