diff options
Diffstat (limited to 'firmware/target/arm/s5l8702/system-s5l8702.c')
-rw-r--r-- | firmware/target/arm/s5l8702/system-s5l8702.c | 27 |
1 files changed, 17 insertions, 10 deletions
diff --git a/firmware/target/arm/s5l8702/system-s5l8702.c b/firmware/target/arm/s5l8702/system-s5l8702.c index c3f20c506b..09aff3d84e 100644 --- a/firmware/target/arm/s5l8702/system-s5l8702.c +++ b/firmware/target/arm/s5l8702/system-s5l8702.c | |||
@@ -39,15 +39,14 @@ default_interrupt(INT_IRQ3); | |||
39 | default_interrupt(INT_IRQ4); | 39 | default_interrupt(INT_IRQ4); |
40 | default_interrupt(INT_IRQ5); | 40 | default_interrupt(INT_IRQ5); |
41 | default_interrupt(INT_IRQ6); | 41 | default_interrupt(INT_IRQ6); |
42 | default_interrupt(INT_IRQ7); | 42 | default_interrupt(INT_TIMERE); /* IRQ7: 32-bit timers */ |
43 | default_interrupt(INT_TIMERA); | ||
44 | default_interrupt(INT_TIMERB); | ||
45 | default_interrupt(INT_TIMERC); | ||
46 | default_interrupt(INT_TIMERD); | ||
47 | default_interrupt(INT_TIMERE); | ||
48 | default_interrupt(INT_TIMERF); | 43 | default_interrupt(INT_TIMERF); |
49 | default_interrupt(INT_TIMERG); | 44 | default_interrupt(INT_TIMERG); |
50 | default_interrupt(INT_TIMERH); | 45 | default_interrupt(INT_TIMERH); |
46 | default_interrupt(INT_TIMERA); /* IRQ8: 16-bit timers */ | ||
47 | default_interrupt(INT_TIMERB); | ||
48 | default_interrupt(INT_TIMERC); | ||
49 | default_interrupt(INT_TIMERD); | ||
51 | default_interrupt(INT_IRQ9); | 50 | default_interrupt(INT_IRQ9); |
52 | default_interrupt(INT_IRQ10); | 51 | default_interrupt(INT_IRQ10); |
53 | default_interrupt(INT_IRQ11); | 52 | default_interrupt(INT_IRQ11); |
@@ -129,9 +128,16 @@ void INT_TIMER() | |||
129 | if (TBCON & (TBCON >> 4) & 0x7000) INT_TIMERB(); | 128 | if (TBCON & (TBCON >> 4) & 0x7000) INT_TIMERB(); |
130 | if (TCCON & (TCCON >> 4) & 0x7000) INT_TIMERC(); | 129 | if (TCCON & (TCCON >> 4) & 0x7000) INT_TIMERC(); |
131 | if (TDCON & (TDCON >> 4) & 0x7000) INT_TIMERD(); | 130 | if (TDCON & (TDCON >> 4) & 0x7000) INT_TIMERD(); |
132 | if (TFCON & (TFCON >> 4) & 0x7000) INT_TIMERF(); | 131 | } |
133 | if (TGCON & (TGCON >> 4) & 0x7000) INT_TIMERG(); | 132 | |
134 | if (THCON & (THCON >> 4) & 0x7000) INT_TIMERH(); | 133 | void INT_TIMER32(void) ICODE_ATTR; |
134 | void INT_TIMER32() | ||
135 | { | ||
136 | uint32_t tstat = TSTAT; | ||
137 | /*if ((TECON >> 12) & 0x7 & (tstat >> 24)) INT_TIMERE();*/ | ||
138 | if ((TFCON >> 12) & 0x7 & (tstat >> 16)) INT_TIMERF(); | ||
139 | if ((TGCON >> 12) & 0x7 & (tstat >> 8)) INT_TIMERG(); | ||
140 | if ((THCON >> 12) & 0x7 & tstat) INT_TIMERH(); | ||
135 | } | 141 | } |
136 | 142 | ||
137 | void INT_DMAC0(void) ICODE_ATTR; | 143 | void INT_DMAC0(void) ICODE_ATTR; |
@@ -164,7 +170,7 @@ void INT_DMAC1() | |||
164 | 170 | ||
165 | static void (* const irqvector[])(void) = | 171 | static void (* const irqvector[])(void) = |
166 | { | 172 | { |
167 | INT_IRQ0,INT_IRQ1,INT_IRQ2,INT_IRQ3,INT_IRQ4,INT_IRQ5,INT_IRQ6,INT_IRQ7, | 173 | INT_IRQ0,INT_IRQ1,INT_IRQ2,INT_IRQ3,INT_IRQ4,INT_IRQ5,INT_IRQ6,INT_TIMER32, |
168 | INT_TIMER,INT_IRQ9,INT_IRQ10,INT_IRQ11,INT_IRQ12,INT_IRQ13,INT_IRQ14,INT_IRQ15, | 174 | INT_TIMER,INT_IRQ9,INT_IRQ10,INT_IRQ11,INT_IRQ12,INT_IRQ13,INT_IRQ14,INT_IRQ15, |
169 | INT_DMAC0,INT_DMAC1,INT_IRQ18,INT_USB_FUNC,INT_IRQ20,INT_IRQ21,INT_IRQ22,INT_WHEEL, | 175 | INT_DMAC0,INT_DMAC1,INT_IRQ18,INT_USB_FUNC,INT_IRQ20,INT_IRQ21,INT_IRQ22,INT_WHEEL, |
170 | INT_IRQ24,INT_IRQ25,INT_IRQ26,INT_IRQ27,INT_IRQ28,INT_ATA,INT_IRQ30,INT_IRQ31, | 176 | INT_IRQ24,INT_IRQ25,INT_IRQ26,INT_IRQ27,INT_IRQ28,INT_ATA,INT_IRQ30,INT_IRQ31, |
@@ -220,6 +226,7 @@ void system_init(void) | |||
220 | VIC0INTENABLE = 1 << IRQ_WHEEL; | 226 | VIC0INTENABLE = 1 << IRQ_WHEEL; |
221 | VIC0INTENABLE = 1 << IRQ_ATA; | 227 | VIC0INTENABLE = 1 << IRQ_ATA; |
222 | VIC1INTENABLE = 1 << (IRQ_MMC - 32); | 228 | VIC1INTENABLE = 1 << (IRQ_MMC - 32); |
229 | VIC0INTENABLE = 1 << IRQ_TIMER32; | ||
223 | } | 230 | } |
224 | 231 | ||
225 | void system_reboot(void) | 232 | void system_reboot(void) |