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Diffstat (limited to 'firmware/target/arm/s5l8702/system-s5l8702.c')
-rw-r--r--firmware/target/arm/s5l8702/system-s5l8702.c268
1 files changed, 268 insertions, 0 deletions
diff --git a/firmware/target/arm/s5l8702/system-s5l8702.c b/firmware/target/arm/s5l8702/system-s5l8702.c
new file mode 100644
index 0000000000..6973738790
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+++ b/firmware/target/arm/s5l8702/system-s5l8702.c
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1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: system-s5l8700.c 28935 2010-12-30 20:23:46Z Buschel $
9 *
10 * Copyright (C) 2007 by Rob Purchase
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "kernel.h"
23#include "system.h"
24#include "panic.h"
25#include "system-target.h"
26#include "pmu-target.h"
27
28#define default_interrupt(name) \
29 extern __attribute__((weak,alias("UIRQ"))) void name (void)
30
31void irq_handler(void) __attribute__((interrupt ("IRQ"), naked));
32void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked, \
33 weak, alias("fiq_dummy")));
34
35default_interrupt(INT_IRQ0);
36default_interrupt(INT_IRQ1);
37default_interrupt(INT_IRQ2);
38default_interrupt(INT_IRQ3);
39default_interrupt(INT_IRQ4);
40default_interrupt(INT_IRQ5);
41default_interrupt(INT_IRQ6);
42default_interrupt(INT_IRQ7);
43default_interrupt(INT_TIMERA);
44default_interrupt(INT_TIMERB);
45default_interrupt(INT_TIMERC);
46default_interrupt(INT_TIMERD);
47default_interrupt(INT_TIMERE);
48default_interrupt(INT_TIMERF);
49default_interrupt(INT_TIMERG);
50default_interrupt(INT_TIMERH);
51default_interrupt(INT_IRQ9);
52default_interrupt(INT_IRQ10);
53default_interrupt(INT_IRQ11);
54default_interrupt(INT_IRQ12);
55default_interrupt(INT_IRQ13);
56default_interrupt(INT_IRQ14);
57default_interrupt(INT_IRQ15);
58default_interrupt(INT_DMAC0C0);
59default_interrupt(INT_DMAC0C1);
60default_interrupt(INT_DMAC0C2);
61default_interrupt(INT_DMAC0C3);
62default_interrupt(INT_DMAC0C4);
63default_interrupt(INT_DMAC0C5);
64default_interrupt(INT_DMAC0C6);
65default_interrupt(INT_DMAC0C7);
66default_interrupt(INT_DMAC1C0);
67default_interrupt(INT_DMAC1C1);
68default_interrupt(INT_DMAC1C2);
69default_interrupt(INT_DMAC1C3);
70default_interrupt(INT_DMAC1C4);
71default_interrupt(INT_DMAC1C5);
72default_interrupt(INT_DMAC1C6);
73default_interrupt(INT_DMAC1C7);
74default_interrupt(INT_IRQ18);
75default_interrupt(INT_USB_FUNC);
76default_interrupt(INT_IRQ20);
77default_interrupt(INT_IRQ21);
78default_interrupt(INT_IRQ22);
79default_interrupt(INT_WHEEL);
80default_interrupt(INT_IRQ24);
81default_interrupt(INT_IRQ25);
82default_interrupt(INT_IRQ26);
83default_interrupt(INT_IRQ27);
84default_interrupt(INT_IRQ28);
85default_interrupt(INT_ATA);
86default_interrupt(INT_IRQ30);
87default_interrupt(INT_IRQ31);
88default_interrupt(INT_IRQ32);
89default_interrupt(INT_IRQ33);
90default_interrupt(INT_IRQ34);
91default_interrupt(INT_IRQ35);
92default_interrupt(INT_IRQ36);
93default_interrupt(INT_IRQ37);
94default_interrupt(INT_IRQ38);
95default_interrupt(INT_IRQ39);
96default_interrupt(INT_IRQ40);
97default_interrupt(INT_IRQ41);
98default_interrupt(INT_IRQ42);
99default_interrupt(INT_IRQ43);
100default_interrupt(INT_IRQ44);
101default_interrupt(INT_IRQ45);
102default_interrupt(INT_IRQ46);
103default_interrupt(INT_IRQ47);
104default_interrupt(INT_IRQ48);
105default_interrupt(INT_IRQ49);
106default_interrupt(INT_IRQ50);
107default_interrupt(INT_IRQ51);
108default_interrupt(INT_IRQ52);
109default_interrupt(INT_IRQ53);
110default_interrupt(INT_IRQ54);
111default_interrupt(INT_IRQ55);
112default_interrupt(INT_IRQ56);
113default_interrupt(INT_IRQ57);
114default_interrupt(INT_IRQ58);
115default_interrupt(INT_IRQ59);
116default_interrupt(INT_IRQ60);
117default_interrupt(INT_IRQ61);
118default_interrupt(INT_IRQ62);
119default_interrupt(INT_IRQ63);
120
121
122int current_irq;
123
124
125void INT_TIMER(void) ICODE_ATTR;
126void INT_TIMER()
127{
128 if (TACON & (TACON >> 4) & 0x7000) INT_TIMERA();
129 if (TBCON & (TBCON >> 4) & 0x7000) INT_TIMERB();
130 if (TCCON & (TCCON >> 4) & 0x7000) INT_TIMERC();
131 if (TDCON & (TDCON >> 4) & 0x7000) INT_TIMERD();
132 if (TFCON & (TFCON >> 4) & 0x7000) INT_TIMERF();
133 if (TGCON & (TGCON >> 4) & 0x7000) INT_TIMERG();
134 if (THCON & (THCON >> 4) & 0x7000) INT_TIMERH();
135}
136
137void INT_DMAC0(void) ICODE_ATTR;
138void INT_DMAC0()
139{
140 uint32_t intsts = DMAC0INTSTS;
141 if (intsts & 1) INT_DMAC0C0();
142 if (intsts & 2) INT_DMAC0C1();
143 if (intsts & 4) INT_DMAC0C2();
144 if (intsts & 8) INT_DMAC0C3();
145 if (intsts & 0x10) INT_DMAC0C4();
146 if (intsts & 0x20) INT_DMAC0C5();
147 if (intsts & 0x40) INT_DMAC0C6();
148 if (intsts & 0x80) INT_DMAC0C7();
149}
150
151void INT_DMAC1(void) ICODE_ATTR;
152void INT_DMAC1()
153{
154 uint32_t intsts = DMAC1INTSTS;
155 if (intsts & 1) INT_DMAC1C0();
156 if (intsts & 2) INT_DMAC1C1();
157 if (intsts & 4) INT_DMAC1C2();
158 if (intsts & 8) INT_DMAC1C3();
159 if (intsts & 0x10) INT_DMAC1C4();
160 if (intsts & 0x20) INT_DMAC1C5();
161 if (intsts & 0x40) INT_DMAC1C6();
162 if (intsts & 0x80) INT_DMAC1C7();
163}
164
165static void (* const irqvector[])(void) =
166{
167 INT_IRQ0,INT_IRQ1,INT_IRQ2,INT_IRQ3,INT_IRQ4,INT_IRQ5,INT_IRQ6,INT_IRQ7,
168 INT_TIMER,INT_IRQ9,INT_IRQ10,INT_IRQ11,INT_IRQ12,INT_IRQ13,INT_IRQ14,INT_IRQ15,
169 INT_DMAC0,INT_DMAC1,INT_IRQ18,INT_USB_FUNC,INT_IRQ20,INT_IRQ21,INT_IRQ22,INT_WHEEL,
170 INT_IRQ24,INT_IRQ25,INT_IRQ26,INT_IRQ27,INT_IRQ28,INT_ATA,INT_IRQ30,INT_IRQ31,
171 INT_IRQ32,INT_IRQ33,INT_IRQ34,INT_IRQ35,INT_IRQ36,INT_IRQ37,INT_IRQ38,INT_IRQ39,
172 INT_IRQ40,INT_IRQ41,INT_IRQ42,INT_IRQ43,INT_IRQ55,INT_IRQ56,INT_IRQ57,INT_IRQ58,
173 INT_IRQ48,INT_IRQ49,INT_IRQ50,INT_IRQ51,INT_IRQ52,INT_IRQ53,INT_IRQ54,INT_IRQ55,
174 INT_IRQ56,INT_IRQ57,INT_IRQ58,INT_IRQ59,INT_IRQ60,INT_IRQ61,INT_IRQ62,INT_IRQ63
175};
176
177static void UIRQ(void)
178{
179 panicf("Unhandled IRQ %d!", current_irq);
180}
181
182void irq_handler(void)
183{
184 /*
185 * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c
186 */
187
188 asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */
189 "sub sp, sp, #8 \n"); /* Reserve stack */
190
191 void* dummy = VIC0ADDRESS;
192 dummy = VIC1ADDRESS;
193 uint32_t irqs0 = VIC0IRQSTATUS;
194 uint32_t irqs1 = VIC1IRQSTATUS;
195 for (current_irq = 0; irqs0; current_irq++, irqs0 >>= 1)
196 if (irqs0 & 1)
197 irqvector[current_irq]();
198 for (current_irq = 32; irqs1; current_irq++, irqs1 >>= 1)
199 if (irqs1 & 1)
200 irqvector[current_irq]();
201 VIC0ADDRESS = NULL;
202 VIC1ADDRESS = NULL;
203
204 asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */
205 "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */
206 "subs pc, lr, #4 \n"); /* Return from IRQ */
207}
208
209void fiq_dummy(void)
210{
211 asm volatile (
212 "subs pc, lr, #4 \r\n"
213 );
214}
215
216
217void system_init(void)
218{
219 pmu_init();
220 VIC0INTENABLE = 1 << IRQ_WHEEL;
221}
222
223void system_reboot(void)
224{
225 /* Reset the SoC */
226 asm volatile("msr CPSR_c, #0xd3 \n"
227 "mov r0, #0x100000 \n"
228 "mov r1, #0x3c800000 \n"
229 "str r0, [r1] \n");
230
231 /* Wait for reboot to kick in */
232 while(1);
233}
234
235//extern void post_mortem_stub(void);
236
237void system_exception_wait(void)
238{
239// post_mortem_stub();
240 while(1);
241}
242
243int system_memory_guard(int newmode)
244{
245 (void)newmode;
246 return 0;
247}
248
249#ifdef HAVE_ADJUSTABLE_CPU_FREQ
250
251void set_cpu_frequency(long frequency)
252{
253 if (cpu_frequency == frequency)
254 return;
255
256 if (frequency == CPUFREQ_MAX)
257 {
258 //TODO: Figure out and implement
259 }
260 else
261 {
262 //TODO: Figure out and implement
263 }
264
265 cpu_frequency = frequency;
266}
267
268#endif
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