diff options
Diffstat (limited to 'firmware/target/arm/s5l8702/crt0.S')
-rw-r--r-- | firmware/target/arm/s5l8702/crt0.S | 207 |
1 files changed, 207 insertions, 0 deletions
diff --git a/firmware/target/arm/s5l8702/crt0.S b/firmware/target/arm/s5l8702/crt0.S new file mode 100644 index 0000000000..da2f49c971 --- /dev/null +++ b/firmware/target/arm/s5l8702/crt0.S | |||
@@ -0,0 +1,207 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id: crt0.S 18776 2008-10-11 18:32:17Z gevaerts $ | ||
9 | * | ||
10 | * Copyright (C) 2008 by Marcoen Hirschberg | ||
11 | * Copyright (C) 2008 by Denes Balatoni | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or | ||
14 | * modify it under the terms of the GNU General Public License | ||
15 | * as published by the Free Software Foundation; either version 2 | ||
16 | * of the License, or (at your option) any later version. | ||
17 | * | ||
18 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
19 | * KIND, either express or implied. | ||
20 | * | ||
21 | ****************************************************************************/ | ||
22 | #define ASM | ||
23 | #include "config.h" | ||
24 | #include "cpu.h" | ||
25 | |||
26 | #define CACHE_NONE 0 | ||
27 | #define CACHE_ALL 0x0C | ||
28 | |||
29 | .section .intvect,"ax",%progbits | ||
30 | .global start | ||
31 | .global _newstart | ||
32 | /* Exception vectors */ | ||
33 | start: | ||
34 | b _newstart | ||
35 | ldr pc, =undef_instr_handler | ||
36 | ldr pc, =software_int_handler | ||
37 | ldr pc, =prefetch_abort_handler | ||
38 | ldr pc, =data_abort_handler | ||
39 | ldr pc, =reserved_handler | ||
40 | ldr pc, =irq_handler | ||
41 | ldr pc, =fiq_handler | ||
42 | .ltorg | ||
43 | _newstart: | ||
44 | #if !defined(BOOTLOADER) | ||
45 | ldr pc, =newstart2 // we do not want to execute from 0x0 as iram will be mapped there | ||
46 | .section .init.text,"ax",%progbits | ||
47 | newstart2: | ||
48 | #endif | ||
49 | msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */ | ||
50 | |||
51 | #ifdef BOOTLOADER | ||
52 | /* Relocate ourself to IRAM - we have been loaded to DRAM */ | ||
53 | mov r0, #0x08000000 /* source (DRAM) */ | ||
54 | mov r1, #0x22000000 /* dest (IRAM) */ | ||
55 | ldr r2, =_dataend | ||
56 | 1: | ||
57 | cmp r2, r1 | ||
58 | ldrhi r3, [r0], #4 | ||
59 | strhi r3, [r1], #4 | ||
60 | bhi 1b | ||
61 | |||
62 | ldr pc, =start_loc /* jump to the relocated start_loc: */ | ||
63 | start_loc: | ||
64 | #endif | ||
65 | |||
66 | mrc 15, 0, r0, c1, c0, 0 | ||
67 | bic r0, r0, #0x1000 | ||
68 | bic r0, r0, #0x5 | ||
69 | mcr 15, 0, r0, c1, c0, 0 // disable caches and protection unit | ||
70 | |||
71 | .cleancache: | ||
72 | mrc p15, 0, r15,c7,c10,3 | ||
73 | bne .cleancache | ||
74 | mov r0, #0 | ||
75 | mcr p15, 0, r0,c7,c10,4 | ||
76 | mcr p15, 0, r0,c7,c5,0 | ||
77 | bl ttb_init | ||
78 | |||
79 | mov r0, #0 @ physical address | ||
80 | mov r1, #0 @ virtual address | ||
81 | mov r2, #0x380 @ size (all memory) | ||
82 | mov r3, #CACHE_ALL | ||
83 | bl map_section | ||
84 | |||
85 | mov r0, #0x38000000 @ physical address | ||
86 | mov r1, #0x38000000 @ virtual address | ||
87 | mov r2, #0x80 @ size (AHB/APB) | ||
88 | mov r3, #CACHE_NONE | ||
89 | bl map_section | ||
90 | |||
91 | bl enable_mmu | ||
92 | |||
93 | mrc 15, 0, r0, c1, c0, 0 | ||
94 | orr r0, r0, #0x5 | ||
95 | orr r0, r0, #0x1000 | ||
96 | mcr 15, 0, r0, c1, c0, 0 // re-enable protection unit and caches | ||
97 | |||
98 | ldr r1, =0x38e00000 | ||
99 | add r2, r1, #0x00001000 | ||
100 | add r3, r1, #0x00002000 | ||
101 | sub r4, r0, #1 | ||
102 | str r4, [r1,#0x14] | ||
103 | str r4, [r2,#0x14] | ||
104 | str r4, [r1,#0xf00] | ||
105 | str r4, [r2,#0xf00] | ||
106 | str r4, [r3,#0x08] | ||
107 | str r4, [r3,#0x0c] | ||
108 | str r0, [r1,#0x14] | ||
109 | str r0, [r2,#0x14] | ||
110 | |||
111 | #if !defined(BOOTLOADER) | ||
112 | /* Copy interrupt vectors to iram */ | ||
113 | ldr r2, =_intvectstart | ||
114 | ldr r3, =_intvectend | ||
115 | ldr r4, =_intvectcopy | ||
116 | 1: | ||
117 | cmp r3, r2 | ||
118 | ldrhi r1, [r4], #4 | ||
119 | strhi r1, [r2], #4 | ||
120 | bhi 1b | ||
121 | #endif | ||
122 | |||
123 | /* Initialise bss section to zero */ | ||
124 | ldr r2, =_edata | ||
125 | ldr r3, =_end | ||
126 | mov r4, #0 | ||
127 | 1: | ||
128 | cmp r3, r2 | ||
129 | strhi r4, [r2], #4 | ||
130 | bhi 1b | ||
131 | |||
132 | #ifndef BOOTLOADER | ||
133 | /* Copy icode and data to ram */ | ||
134 | ldr r2, =_iramstart | ||
135 | ldr r3, =_iramend | ||
136 | ldr r4, =_iramcopy | ||
137 | 1: | ||
138 | cmp r3, r2 | ||
139 | ldrhi r1, [r4], #4 | ||
140 | strhi r1, [r2], #4 | ||
141 | bhi 1b | ||
142 | |||
143 | /* Initialise ibss section to zero */ | ||
144 | ldr r2, =_iedata | ||
145 | ldr r3, =_iend | ||
146 | mov r4, #0 | ||
147 | 1: | ||
148 | cmp r3, r2 | ||
149 | strhi r4, [r2], #4 | ||
150 | bhi 1b | ||
151 | #endif | ||
152 | |||
153 | /* Set up some stack and munge it with 0xdeadbeef */ | ||
154 | ldr sp, =stackend | ||
155 | ldr r2, =stackbegin | ||
156 | ldr r3, =0xdeadbeef | ||
157 | 1: | ||
158 | cmp sp, r2 | ||
159 | strhi r3, [r2], #4 | ||
160 | bhi 1b | ||
161 | |||
162 | /* Set up stack for IRQ mode */ | ||
163 | msr cpsr_c, #0xd2 | ||
164 | ldr sp, =_irqstackend | ||
165 | |||
166 | /* Set up stack for FIQ mode */ | ||
167 | msr cpsr_c, #0xd1 | ||
168 | ldr sp, =_fiqstackend | ||
169 | |||
170 | /* Let abort and undefined modes use IRQ stack */ | ||
171 | msr cpsr_c, #0xd7 | ||
172 | ldr sp, =_irqstackend | ||
173 | msr cpsr_c, #0xdb | ||
174 | ldr sp, =_irqstackend | ||
175 | |||
176 | /* Switch back to supervisor mode */ | ||
177 | msr cpsr_c, #0xd3 | ||
178 | |||
179 | bl main | ||
180 | |||
181 | .text | ||
182 | /* .global UIE*/ | ||
183 | |||
184 | /* All illegal exceptions call into UIE with exception address as first | ||
185 | * parameter. This is calculated differently depending on which exception | ||
186 | * we're in. Second parameter is exception number, used for a string lookup | ||
187 | * in UIE. */ | ||
188 | undef_instr_handler: | ||
189 | sub r0, lr, #4 | ||
190 | mov r1, #0 | ||
191 | b UIE | ||
192 | |||
193 | /* We run supervisor mode most of the time, and should never see a software | ||
194 | * exception being thrown. Perhaps make it illegal and call UIE? */ | ||
195 | software_int_handler: | ||
196 | reserved_handler: | ||
197 | movs pc, lr | ||
198 | |||
199 | prefetch_abort_handler: | ||
200 | sub r0, lr, #4 | ||
201 | mov r1, #1 | ||
202 | b UIE | ||
203 | |||
204 | data_abort_handler: | ||
205 | sub r0, lr, #8 | ||
206 | mov r1, #2 | ||
207 | b UIE | ||