diff options
Diffstat (limited to 'firmware/target/arm/s5l8700/uart-s5l8701.c')
-rw-r--r-- | firmware/target/arm/s5l8700/uart-s5l8701.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/firmware/target/arm/s5l8700/uart-s5l8701.c b/firmware/target/arm/s5l8700/uart-s5l8701.c index 00c9322e47..b9fb1632ac 100644 --- a/firmware/target/arm/s5l8700/uart-s5l8701.c +++ b/firmware/target/arm/s5l8700/uart-s5l8701.c | |||
@@ -68,7 +68,7 @@ static uint8_t clockgate_uartc[S5L8701_N_UARTC] = { | |||
68 | CLOCKGATE_UARTC0, CLOCKGATE_UARTC1, CLOCKGATE_UARTC2 }; | 68 | CLOCKGATE_UARTC0, CLOCKGATE_UARTC1, CLOCKGATE_UARTC2 }; |
69 | 69 | ||
70 | static int intmsk_uart[S5L8701_N_UARTC] = { | 70 | static int intmsk_uart[S5L8701_N_UARTC] = { |
71 | INTMSK_UART0, INTMSK_UART1, INTMSK_UART2 }; | 71 | INTMSK_EINTG0, INTMSK_UART1, INTMSK_UART2 }; |
72 | 72 | ||
73 | /* | 73 | /* |
74 | * Device level functions specific to S5L8701 | 74 | * Device level functions specific to S5L8701 |
@@ -107,6 +107,7 @@ void uart_target_disable_gpio(int uart_id, int port_id) | |||
107 | void uart_target_enable_irq(int uart_id, int port_id) | 107 | void uart_target_enable_irq(int uart_id, int port_id) |
108 | { | 108 | { |
109 | (void) port_id; | 109 | (void) port_id; |
110 | if (uart_id == 0) GPIOIC_INTEN(0) = 0x200; | ||
110 | INTMSK |= intmsk_uart[uart_id]; | 111 | INTMSK |= intmsk_uart[uart_id]; |
111 | } | 112 | } |
112 | 113 | ||
@@ -114,11 +115,13 @@ void uart_target_disable_irq(int uart_id, int port_id) | |||
114 | { | 115 | { |
115 | (void) port_id; | 116 | (void) port_id; |
116 | INTMSK &= ~intmsk_uart[uart_id]; | 117 | INTMSK &= ~intmsk_uart[uart_id]; |
118 | if (uart_id == 0) GPIOIC_INTEN(0) = 0; | ||
117 | } | 119 | } |
118 | 120 | ||
119 | void uart_target_clear_irq(int uart_id, int port_id) | 121 | void uart_target_clear_irq(int uart_id, int port_id) |
120 | { | 122 | { |
121 | (void) port_id; | 123 | (void) port_id; |
124 | if (uart_id == 0) GPIOIC_INTSTAT(0) = 0x200; | ||
122 | SRCPND |= intmsk_uart[uart_id]; | 125 | SRCPND |= intmsk_uart[uart_id]; |
123 | } | 126 | } |
124 | 127 | ||
@@ -135,10 +138,20 @@ void uart_target_disable_clocks(int uart_id) | |||
135 | /* | 138 | /* |
136 | * ISRs | 139 | * ISRs |
137 | */ | 140 | */ |
138 | void ICODE_ATTR INT_UART0(void) | 141 | |
142 | /* On Nano2G, PORT0 interrupts are not used when iAP is disabled */ | ||
143 | #if !defined(IPOD_NANO2G) || defined(IPOD_ACCESSORY_PROTOCOL) | ||
144 | /* | ||
145 | * UART0 IRQ is connected to EINTG0, this is a quick patch, a "real" | ||
146 | * EINT handler will be needed if in future we use more than one IRQ | ||
147 | * on this group. | ||
148 | */ | ||
149 | void ICODE_ATTR EINT_G0(void) | ||
139 | { | 150 | { |
151 | GPIOIC_INTSTAT(0) = 0x200; /* clear external IRQ */ | ||
140 | uartc_callback(&s5l8701_uartc0, 0); | 152 | uartc_callback(&s5l8701_uartc0, 0); |
141 | } | 153 | } |
154 | #endif | ||
142 | 155 | ||
143 | /* UARTC1,2 not used on Nano2G */ | 156 | /* UARTC1,2 not used on Nano2G */ |
144 | #ifndef IPOD_NANO2G | 157 | #ifndef IPOD_NANO2G |