diff options
Diffstat (limited to 'firmware/target/arm/s5l8700/pcm-s5l8700.c')
-rw-r--r-- | firmware/target/arm/s5l8700/pcm-s5l8700.c | 37 |
1 files changed, 21 insertions, 16 deletions
diff --git a/firmware/target/arm/s5l8700/pcm-s5l8700.c b/firmware/target/arm/s5l8700/pcm-s5l8700.c index 9421956131..f461465663 100644 --- a/firmware/target/arm/s5l8700/pcm-s5l8700.c +++ b/firmware/target/arm/s5l8700/pcm-s5l8700.c | |||
@@ -47,12 +47,24 @@ static volatile int locked = 0; | |||
47 | static const struct div_entry { | 47 | static const struct div_entry { |
48 | int pdiv, mdiv, sdiv, cdiv; | 48 | int pdiv, mdiv, sdiv, cdiv; |
49 | } div_table[HW_NUM_FREQ] = { | 49 | } div_table[HW_NUM_FREQ] = { |
50 | [HW_FREQ_11] = { 26, 189, 3, 8}, | ||
51 | #ifdef IPOD_NANO2G | 50 | #ifdef IPOD_NANO2G |
52 | [HW_FREQ_22] = { 5, 6, 3, 4}, | 51 | [HW_FREQ_11] = { 2, 41, 5, 4}, |
52 | [HW_FREQ_22] = { 2, 41, 4, 4}, | ||
53 | [HW_FREQ_44] = { 2, 41, 3, 4}, | ||
54 | [HW_FREQ_88] = { 2, 41, 2, 4}, | ||
55 | #if 0 /* disabled because the codec driver does not support it (yet) */ | ||
56 | [HW_FREQ_8 ] = { 2, 12, 3, 9} | ||
57 | [HW_FREQ_16] = { 2, 12, 2, 9}, | ||
58 | [HW_FREQ_32] = { 2, 12, 1, 9}, | ||
59 | |||
60 | [HW_FREQ_12] = { 2, 12, 4, 3}, | ||
61 | [HW_FREQ_24] = { 2, 12, 3, 3}, | ||
62 | [HW_FREQ_48] = { 2, 12, 2, 3}, | ||
63 | [HW_FREQ_96] = { 2, 12, 1, 3}, | ||
64 | #endif | ||
53 | #else | 65 | #else |
66 | [HW_FREQ_11] = { 26, 189, 3, 8}, | ||
54 | [HW_FREQ_22] = { 50, 98, 2, 8}, | 67 | [HW_FREQ_22] = { 50, 98, 2, 8}, |
55 | #endif | ||
56 | [HW_FREQ_44] = { 37, 151, 1, 9}, | 68 | [HW_FREQ_44] = { 37, 151, 1, 9}, |
57 | [HW_FREQ_88] = { 50, 98, 1, 4}, | 69 | [HW_FREQ_88] = { 50, 98, 1, 4}, |
58 | #if 0 /* disabled because the codec driver does not support it (yet) */ | 70 | #if 0 /* disabled because the codec driver does not support it (yet) */ |
@@ -65,6 +77,7 @@ static const struct div_entry { | |||
65 | [HW_FREQ_48] = { 28, 192, 2, 4}, | 77 | [HW_FREQ_48] = { 28, 192, 2, 4}, |
66 | [HW_FREQ_96] = { 28, 192, 1, 4}, | 78 | [HW_FREQ_96] = { 28, 192, 1, 4}, |
67 | #endif | 79 | #endif |
80 | #endif | ||
68 | }; | 81 | }; |
69 | 82 | ||
70 | /* Mask the DMA interrupt */ | 83 | /* Mask the DMA interrupt */ |
@@ -121,6 +134,9 @@ void pcm_play_dma_start(const void *addr, size_t size) | |||
121 | dma_callback); | 134 | dma_callback); |
122 | 135 | ||
123 | #ifdef IPOD_NANO2G | 136 | #ifdef IPOD_NANO2G |
137 | PCON5 = (PCON5 & ~(0xFFFF0000)) | 0x77720000; | ||
138 | PCON6 = (PCON6 & ~(0x0F000000)) | 0x02000000; | ||
139 | |||
124 | I2STXCON = (0x10 << 16) | /* burst length */ | 140 | I2STXCON = (0x10 << 16) | /* burst length */ |
125 | (0 << 15) | /* 0 = falling edge */ | 141 | (0 << 15) | /* 0 = falling edge */ |
126 | (0 << 13) | /* 0 = basic I2S format */ | 142 | (0 << 13) | /* 0 = basic I2S format */ |
@@ -186,7 +202,7 @@ void pcm_play_dma_init(void) | |||
186 | { | 202 | { |
187 | /* configure IIS pins */ | 203 | /* configure IIS pins */ |
188 | #ifdef IPOD_NANO2G | 204 | #ifdef IPOD_NANO2G |
189 | PCON5 = (PCON5 & ~(0xFFFFF000)) | 0x22220000; | 205 | PCON5 = (PCON5 & ~(0xFFFF0000)) | 0x22220000; |
190 | PCON6 = (PCON6 & ~(0x0F000000)) | 0x02000000; | 206 | PCON6 = (PCON6 & ~(0x0F000000)) | 0x02000000; |
191 | #else | 207 | #else |
192 | PCON7 = (PCON7 & ~(0x0FFFFF00)) | 0x02222200; | 208 | PCON7 = (PCON7 & ~(0x0FFFFF00)) | 0x02222200; |
@@ -216,17 +232,10 @@ void pcm_dma_apply_settings(void) | |||
216 | PLLCON |= 4; | 232 | PLLCON |= 4; |
217 | 233 | ||
218 | /* configure PLL1 and MCLK for the desired sample rate */ | 234 | /* configure PLL1 and MCLK for the desired sample rate */ |
219 | #ifdef IPOD_NANO2G | ||
220 | PLL1PMS = (2 << 16) | /* PDIV */ | ||
221 | (12 << 8) | /* MDIV */ | ||
222 | (2 << 0); /* SDIV */ | ||
223 | PLL1LCNT = 0x4d2; | ||
224 | #else | ||
225 | PLL1PMS = (div.pdiv << 16) | | 235 | PLL1PMS = (div.pdiv << 16) | |
226 | (div.mdiv << 8) | | 236 | (div.mdiv << 8) | |
227 | (div.sdiv << 0); | 237 | (div.sdiv << 0); |
228 | PLL1LCNT = 7500; /* no idea what to put here */ | 238 | PLL1LCNT = 7500; /* no idea what to put here */ |
229 | #endif | ||
230 | 239 | ||
231 | /* enable PLL1 and wait for lock */ | 240 | /* enable PLL1 and wait for lock */ |
232 | PLLCON |= (1 << 1); | 241 | PLLCON |= (1 << 1); |
@@ -237,16 +246,12 @@ void pcm_dma_apply_settings(void) | |||
237 | (0 << 7) | /* MCLK_MASK */ | 246 | (0 << 7) | /* MCLK_MASK */ |
238 | (2 << 5) | /* MCLK_SEL = PLL2 */ | 247 | (2 << 5) | /* MCLK_SEL = PLL2 */ |
239 | (1 << 4) | /* MCLK_DIV_ON */ | 248 | (1 << 4) | /* MCLK_DIV_ON */ |
240 | #ifdef IPOD_NANO2G | ||
241 | (3 - 1); /* MCLK_DIV_VAL */ | ||
242 | #else | ||
243 | (div.cdiv - 1); /* MCLK_DIV_VAL */ | 249 | (div.cdiv - 1); /* MCLK_DIV_VAL */ |
244 | #endif | ||
245 | } | 250 | } |
246 | 251 | ||
247 | size_t pcm_get_bytes_waiting(void) | 252 | size_t pcm_get_bytes_waiting(void) |
248 | { | 253 | { |
249 | return DMATCNT0 * 2; | 254 | return DMACTCNT0 * 2; |
250 | } | 255 | } |
251 | 256 | ||
252 | const void * pcm_play_dma_get_peak_buffer(int *count) | 257 | const void * pcm_play_dma_get_peak_buffer(int *count) |