diff options
Diffstat (limited to 'firmware/target/arm/s5l8700/meizu-m6sl/s6d0154.h')
-rw-r--r-- | firmware/target/arm/s5l8700/meizu-m6sl/s6d0154.h | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/firmware/target/arm/s5l8700/meizu-m6sl/s6d0154.h b/firmware/target/arm/s5l8700/meizu-m6sl/s6d0154.h new file mode 100644 index 0000000000..093c9d2a52 --- /dev/null +++ b/firmware/target/arm/s5l8700/meizu-m6sl/s6d0154.h | |||
@@ -0,0 +1,80 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id: adc-target.h 17847 2008-06-28 18:10:04Z bagder $ | ||
9 | * | ||
10 | * Copyright (C) 2008 by Frank Gevaerts | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #ifndef _S6D0154_H_ | ||
22 | #define _S6D0154_H_ | ||
23 | |||
24 | #define S6D0154_REG_VERSION 0x00 | ||
25 | #define S6D0154_REG_DRIVER_OUTPUT_CONTROL 0x01 | ||
26 | #define S6D0154_REG_LCD_DRIVING_WAVEFORM_CONTROL 0x02 | ||
27 | #define S6D0154_REG_ENTRY_MODE 0x03 | ||
28 | #define S6D0154_REG_DISPLAY_CONTROL 0x07 | ||
29 | #define S6D0154_REG_BLANK_PERIOD_CONTROL 0x08 | ||
30 | #define S6D0154_REG_FRAME_CYCLE_CONTROL 0x0B | ||
31 | #define S6D0154_REG_EXTERNAL_INTERFACE_CONTROL 0x0C | ||
32 | #define S6D0154_REG_START_OSCILLATION 0x0F | ||
33 | #define S6D0154_REG_POWER_CONTROL_1 0x10 | ||
34 | #define S6D0154_REG_POWER_CONTROL_2 0x11 | ||
35 | #define S6D0154_REG_POWER_CONTROL_3 0x12 | ||
36 | #define S6D0154_REG_POWER_CONTROL_4 0x13 | ||
37 | #define S6D0154_REG_POWER_CONTROL_5 0x14 | ||
38 | #define S6D0154_REG_VCI_RECYCLING 0x15 | ||
39 | #define S6D0154_REG_RAM_ADDRESS_REGISTER_1 0x20 | ||
40 | #define S6D0154_REG_RAM_ADDRESS_REGISTER_2 0x21 | ||
41 | #define S6D0154_REG_GRAM_READ_WRITE 0x22 | ||
42 | #define S6D0154_REG_RESET 0x28 | ||
43 | #define S6D0154_REG_FLM_FUNCTION 0x29 | ||
44 | #define S6D0154_REG_GATE_SCAN_POSITION 0x30 | ||
45 | #define S6D0154_REG_VERTICAL_SCROLL_CONTROL_1A 0x31 | ||
46 | #define S6D0154_REG_VERTICAL_SCROLL_CONTROL_1B 0x32 | ||
47 | #define S6D0154_REG_VERTICAL_SCROLL_CONTROL_2 0x33 | ||
48 | #define S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_1 0x34 | ||
49 | #define S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_2 0x35 | ||
50 | #define S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_1 0x36 | ||
51 | #define S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_2 0x37 | ||
52 | #define S6D0154_REG_VERTICAL_WINDOW_ADDRESS_1 0x38 | ||
53 | #define S6D0154_REG_VERTICAL_WINDOW_ADDRESS_2 0x39 | ||
54 | #define S6D0154_REG_SUB_PANEL_CONTROL 0x40 | ||
55 | #define S6D0154_REG_MDDI_LINK_WAKEUP_START_POSITION 0x41 | ||
56 | #define S6D0154_REG_SUB_PANEL_SELECTION_INDEX 0x42 | ||
57 | #define S6D0154_REG_SUB_PANEL_DATA_WRITE_INDEX 0x43 | ||
58 | #define S6D0154_REG_GPIO_VALUE 0x44 | ||
59 | #define S6D0154_REG_GPIO_IO_CONTROL 0x45 | ||
60 | #define S6D0154_REG_GPIO_CLEAR 0x46 | ||
61 | #define S6D0154_REG_GPIO_INTERRUPT_ENABLE 0x47 | ||
62 | #define S6D0154_REG_GPIO_POLARITY_SELECTION 0x48 | ||
63 | |||
64 | #define S6D0154_REG_GAMMA_CONTROL_1 0x50 | ||
65 | #define S6D0154_REG_GAMMA_CONTROL_2 0x51 | ||
66 | #define S6D0154_REG_GAMMA_CONTROL_3 0x52 | ||
67 | #define S6D0154_REG_GAMMA_CONTROL_4 0x53 | ||
68 | #define S6D0154_REG_GAMMA_CONTROL_5 0x54 | ||
69 | #define S6D0154_REG_GAMMA_CONTROL_6 0x55 | ||
70 | #define S6D0154_REG_GAMMA_CONTROL_7 0x56 | ||
71 | #define S6D0154_REG_GAMMA_CONTROL_8 0x57 | ||
72 | #define S6D0154_REG_GAMMA_CONTROL_9 0x58 | ||
73 | #define S6D0154_REG_GAMMA_CONTROL_10 0x59 | ||
74 | |||
75 | #define S6D0154_REG_MTP_TEST_KEY 0x80 | ||
76 | #define S6D0154_REG_MTP_CONTROL_REGISTERS 0x81 | ||
77 | #define S6D0154_REG_MTP_DATA_READ_WRITE 0x82 | ||
78 | #define S6D0154_REG_PRODUCT_NAME_VERSION_WRITE 0x83 | ||
79 | |||
80 | #endif | ||