diff options
Diffstat (limited to 'firmware/target/arm/s3c2440/kernel-s3c2440.c')
-rw-r--r-- | firmware/target/arm/s3c2440/kernel-s3c2440.c | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/firmware/target/arm/s3c2440/kernel-s3c2440.c b/firmware/target/arm/s3c2440/kernel-s3c2440.c new file mode 100644 index 0000000000..6cabc8dc81 --- /dev/null +++ b/firmware/target/arm/s3c2440/kernel-s3c2440.c | |||
@@ -0,0 +1,79 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2007 by Michael Sevakis | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include "config.h" | ||
22 | #include "system.h" | ||
23 | #include "kernel.h" | ||
24 | #include "timer.h" | ||
25 | #include "thread.h" | ||
26 | |||
27 | void tick_start(unsigned int interval_in_ms) | ||
28 | { | ||
29 | /* | ||
30 | * Based on default PCLK of 49.1568MHz - scaling chosen to give | ||
31 | * remainder-free result for tick interval of 10ms (100Hz) | ||
32 | * Timer input clock frequency = | ||
33 | * fPCLK / {prescaler value+1} / {divider value} | ||
34 | * TIMER_FREQ = 49156800 / 2 | ||
35 | * 146300 = TIMER_FREQ / 21 / 8 | ||
36 | * 49156800 = 19*11*(7)*7*5*5*(3)*2*2*2*2*2*2 | ||
37 | * 21 = 7*3 | ||
38 | */ | ||
39 | |||
40 | /* stop timer 4 */ | ||
41 | TCON &= ~(1 << 20); | ||
42 | /* Set the count for timer 4 */ | ||
43 | TCNTB4 = (TIMER_FREQ / TIMER234_PRESCALE / 8) * interval_in_ms / 1000; | ||
44 | /* Set the the prescaler value for timers 2,3, and 4 */ | ||
45 | TCFG0 = (TCFG0 & ~0xff00) | ((TIMER234_PRESCALE-1) << 8); | ||
46 | /* DMA mode off, MUX4 = 1/16 */ | ||
47 | TCFG1 = (TCFG1 & ~0xff0000) | 0x030000; | ||
48 | /* set manual bit */ | ||
49 | TCON |= 1 << 21; | ||
50 | /* reset manual bit */ | ||
51 | TCON &= ~(1 << 21); | ||
52 | |||
53 | /* interval mode */ | ||
54 | TCON |= 1 << 22; | ||
55 | /* start timer 4 */ | ||
56 | TCON |= (1 << 20); | ||
57 | |||
58 | /* timer 4 unmask interrupts */ | ||
59 | INTMSK &= ~TIMER4_MASK; | ||
60 | } | ||
61 | |||
62 | #ifdef BOOTLOADER | ||
63 | void tick_stop(void) | ||
64 | { | ||
65 | s3c_regset32(&INTMSK, TIMER4_MASK); | ||
66 | TCON &= ~(1 << 20); | ||
67 | SRCPND = TIMER4_MASK; | ||
68 | INTPND = TIMER4_MASK; | ||
69 | } | ||
70 | #endif | ||
71 | |||
72 | void TIMER4(void) | ||
73 | { | ||
74 | /* Run through the list of tick tasks */ | ||
75 | call_tick_tasks(); | ||
76 | |||
77 | SRCPND = TIMER4_MASK; | ||
78 | INTPND = TIMER4_MASK; | ||
79 | } | ||