diff options
Diffstat (limited to 'firmware/target/arm/s3c2440/gigabeat-fx/mmu-meg-fx.c')
-rw-r--r-- | firmware/target/arm/s3c2440/gigabeat-fx/mmu-meg-fx.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/mmu-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/mmu-meg-fx.c index 6142213f0c..c47c1330bc 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/mmu-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/mmu-meg-fx.c | |||
@@ -3,7 +3,6 @@ | |||
3 | #include "mmu-meg-fx.h" | 3 | #include "mmu-meg-fx.h" |
4 | #include "panic.h" | 4 | #include "panic.h" |
5 | 5 | ||
6 | void map_memory(void); | ||
7 | static void enable_mmu(void); | 6 | static void enable_mmu(void); |
8 | static void set_ttb(void); | 7 | static void set_ttb(void); |
9 | static void set_page_tables(void); | 8 | static void set_page_tables(void); |
@@ -15,7 +14,7 @@ static void map_section(unsigned int pa, unsigned int va, int mb, int cache_flag | |||
15 | #define BUFFERED (1 << 2) | 14 | #define BUFFERED (1 << 2) |
16 | #define MB (1 << 20) | 15 | #define MB (1 << 20) |
17 | 16 | ||
18 | void map_memory(void) { | 17 | void memory_init(void) { |
19 | set_ttb(); | 18 | set_ttb(); |
20 | set_page_tables(); | 19 | set_page_tables(); |
21 | enable_mmu(); | 20 | enable_mmu(); |
@@ -69,6 +68,20 @@ void map_section(unsigned int pa, unsigned int va, int mb, int cache_flags) { | |||
69 | } | 68 | } |
70 | 69 | ||
71 | static void enable_mmu(void) { | 70 | static void enable_mmu(void) { |
71 | int regread; | ||
72 | |||
73 | asm volatile( | ||
74 | "MRC p15, 0, %r0, c1, c0, 0\n" /* Read reg1, control register */ | ||
75 | : /* outputs */ | ||
76 | "=r"(regread) | ||
77 | : /* inputs */ | ||
78 | : /* clobbers */ | ||
79 | "r0" | ||
80 | ); | ||
81 | |||
82 | if ( !(regread & 0x04) || !(regread & 0x00001000) ) /* Was the ICache or DCache Enabled? */ | ||
83 | clean_dcache(); /* If so we need to clean the DCache before invalidating below */ | ||
84 | |||
72 | asm volatile("mov r0, #0\n" | 85 | asm volatile("mov r0, #0\n" |
73 | "mcr p15, 0, r0, c8, c7, 0\n" /* invalidate TLB */ | 86 | "mcr p15, 0, r0, c8, c7, 0\n" /* invalidate TLB */ |
74 | 87 | ||