summaryrefslogtreecommitdiff
path: root/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c')
-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c
index 69bf922571..9fb2a90c42 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c
@@ -47,23 +47,23 @@ bool lcd_enabled(void)
47 return lcd_on; 47 return lcd_on;
48} 48}
49 49
50unsigned int LCDBANK(unsigned int address) 50static unsigned int LCDBANK(unsigned int address)
51{ 51{
52 return ((address >> 22) & 0xff); 52 return ((address >> 22) & 0xff);
53} 53}
54 54
55unsigned int LCDBASEU(unsigned int address) 55static unsigned int LCDBASEU(unsigned int address)
56{ 56{
57 return (address & ((1 << 22)-1)) >> 1; 57 return (address & ((1 << 22)-1)) >> 1;
58} 58}
59 59
60unsigned int LCDBASEL(unsigned int address) 60static unsigned int LCDBASEL(unsigned int address)
61{ 61{
62 address += 320*240*2; 62 address += 320*240*2;
63 return (address & ((1 << 22)-1)) >> 1; 63 return (address & ((1 << 22)-1)) >> 1;
64} 64}
65 65
66inline void delay_cycles(volatile int delay) 66static inline void delay_cycles(volatile int delay)
67{ 67{
68 while(delay>0) delay--; 68 while(delay>0) delay--;
69} 69}
@@ -138,7 +138,7 @@ static void LCD_SPI_send(const unsigned char *array, int count)
138 } 138 }
139} 139}
140 140
141void LCD_SPI_setreg(unsigned char reg, unsigned char value) 141static void LCD_SPI_setreg(unsigned char reg, unsigned char value)
142{ 142{
143 unsigned char regval[] = 143 unsigned char regval[] =
144 { 144 {
@@ -160,7 +160,7 @@ static void LCD_SPI_SS(bool select)
160 GPBDAT&=~0x100; 160 GPBDAT&=~0x100;
161} 161}
162 162
163void LCD_SPI_start(void) 163static void LCD_SPI_start(void)
164{ 164{
165 s3c_regset(&CLKCON, 0x40000); /* enable SPI clock */ 165 s3c_regset(&CLKCON, 0x40000); /* enable SPI clock */
166 LCD_SPI_SS(false); 166 LCD_SPI_SS(false);
@@ -171,7 +171,7 @@ void LCD_SPI_start(void)
171 LCD_SPI_SS(true); 171 LCD_SPI_SS(true);
172} 172}
173 173
174void LCD_SPI_stop(void) 174static void LCD_SPI_stop(void)
175{ 175{
176 LCD_SPI_SS(false); 176 LCD_SPI_SS(false);
177 177