summaryrefslogtreecommitdiff
path: root/firmware/target/arm/s3c2440/crt0.S
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/target/arm/s3c2440/crt0.S')
-rw-r--r--firmware/target/arm/s3c2440/crt0.S6
1 files changed, 2 insertions, 4 deletions
diff --git a/firmware/target/arm/s3c2440/crt0.S b/firmware/target/arm/s3c2440/crt0.S
index 3110c88be0..2188bc07da 100644
--- a/firmware/target/arm/s3c2440/crt0.S
+++ b/firmware/target/arm/s3c2440/crt0.S
@@ -138,13 +138,11 @@
138 138
139/* For Mini2440 board or compatible */ 139/* For Mini2440 board or compatible */
140/* Clock and Power Management setup values */ 140/* Clock and Power Management setup values */
141/* NB: clock settings must match values in s3c2440/system-target.h */
141#define VAL_CLKDIV 0x5 /* HCLK = FCLK/4, PCLK = HCLK/2 */ 142#define VAL_CLKDIV 0x5 /* HCLK = FCLK/4, PCLK = HCLK/2 */
142#define VAL_UPLLCON 0x00038022 /* UCLK = 48 MHz */ 143#define VAL_UPLLCON 0x00038022 /* UCLK = 48 MHz */
143#define VAL_MPLLCON 0x0007F021 /* FCLK = 405 MHz */ 144#define VAL_MPLLCON 0x000C3041 /* FCLK = 406 MHz */
144 145
145#define FCLK 405000000
146#define HCLK (FCLK/4) /* = 101,250,000 */
147#define PCLK (HCLK/2) /* = 50,625,000 */
148 146
149/* Memory Controller setup */ 147/* Memory Controller setup */
150#define VAL_BWSCON 0x22111112 148#define VAL_BWSCON 0x22111112