diff options
Diffstat (limited to 'firmware/target/arm/pp')
-rw-r--r-- | firmware/target/arm/pp/system-pp5002.c | 19 | ||||
-rw-r--r-- | firmware/target/arm/pp/system-pp502x.c | 21 | ||||
-rw-r--r-- | firmware/target/arm/pp/system-target.h | 17 |
3 files changed, 47 insertions, 10 deletions
diff --git a/firmware/target/arm/pp/system-pp5002.c b/firmware/target/arm/pp/system-pp5002.c index 3186d3739a..388f962fce 100644 --- a/firmware/target/arm/pp/system-pp5002.c +++ b/firmware/target/arm/pp/system-pp5002.c | |||
@@ -24,6 +24,11 @@ | |||
24 | #include "adc-target.h" | 24 | #include "adc-target.h" |
25 | #include "button-target.h" | 25 | #include "button-target.h" |
26 | 26 | ||
27 | #if defined(HAVE_ADJUSTABLE_CPU_FREQ) && (NUM_CORES > 1) | ||
28 | #include "corelock.h" | ||
29 | static struct corelock cpufreq_cl SHAREDBSS_ATTR; | ||
30 | #endif | ||
31 | |||
27 | extern void TIMER1(void); | 32 | extern void TIMER1(void); |
28 | extern void TIMER2(void); | 33 | extern void TIMER2(void); |
29 | 34 | ||
@@ -122,6 +127,18 @@ static void ipod_init_cache(void) | |||
122 | } | 127 | } |
123 | 128 | ||
124 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ | 129 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ |
130 | #if NUM_CORES > 1 | ||
131 | void set_cpu_frequency__lock(void) | ||
132 | { | ||
133 | corelock_lock(&cpufreq_cl); | ||
134 | } | ||
135 | |||
136 | void set_cpu_frequency__unlock(void) | ||
137 | { | ||
138 | corelock_unlock(&cpufreq_cl); | ||
139 | } | ||
140 | #endif /* NUM_CORES > 1 */ | ||
141 | |||
125 | void set_cpu_frequency(long frequency) | 142 | void set_cpu_frequency(long frequency) |
126 | #else | 143 | #else |
127 | static void pp_set_cpu_frequency(long frequency) | 144 | static void pp_set_cpu_frequency(long frequency) |
@@ -193,7 +210,7 @@ void system_init(void) | |||
193 | 210 | ||
194 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ | 211 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ |
195 | #if NUM_CORES > 1 | 212 | #if NUM_CORES > 1 |
196 | cpu_boost_init(); | 213 | corelock_init(&cpufreq_cl); |
197 | #endif | 214 | #endif |
198 | #else | 215 | #else |
199 | pp_set_cpu_frequency(CPUFREQ_MAX); | 216 | pp_set_cpu_frequency(CPUFREQ_MAX); |
diff --git a/firmware/target/arm/pp/system-pp502x.c b/firmware/target/arm/pp/system-pp502x.c index 99b536e132..102cfd8fea 100644 --- a/firmware/target/arm/pp/system-pp502x.c +++ b/firmware/target/arm/pp/system-pp502x.c | |||
@@ -308,16 +308,24 @@ void scale_suspend_core(bool suspend) | |||
308 | } | 308 | } |
309 | 309 | ||
310 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ | 310 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ |
311 | #if NUM_CORES > 1 | ||
312 | void set_cpu_frequency__lock(void) | ||
313 | { | ||
314 | corelock_lock(&cpufreq_cl); | ||
315 | } | ||
316 | |||
317 | void set_cpu_frequency__unlock(void) | ||
318 | { | ||
319 | corelock_unlock(&cpufreq_cl); | ||
320 | } | ||
321 | #endif /* NUM_CORES > 1 */ | ||
322 | |||
311 | void set_cpu_frequency(long frequency) ICODE_ATTR; | 323 | void set_cpu_frequency(long frequency) ICODE_ATTR; |
312 | void set_cpu_frequency(long frequency) | 324 | void set_cpu_frequency(long frequency) |
313 | #else | 325 | #else |
314 | static void pp_set_cpu_frequency(long frequency) | 326 | static void pp_set_cpu_frequency(long frequency) |
315 | #endif | 327 | #endif |
316 | { | 328 | { |
317 | #if defined(HAVE_ADJUSTABLE_CPU_FREQ) && (NUM_CORES > 1) | ||
318 | corelock_lock(&cpufreq_cl); | ||
319 | #endif | ||
320 | |||
321 | switch (frequency) | 329 | switch (frequency) |
322 | { | 330 | { |
323 | /* Note1: The PP5022 PLL must be run at >= 96MHz | 331 | /* Note1: The PP5022 PLL must be run at >= 96MHz |
@@ -424,10 +432,6 @@ static void pp_set_cpu_frequency(long frequency) | |||
424 | DEV_INIT2 &= ~INIT_PLL; /* disable PLL power */ | 432 | DEV_INIT2 &= ~INIT_PLL; /* disable PLL power */ |
425 | break; | 433 | break; |
426 | } | 434 | } |
427 | |||
428 | #if defined(HAVE_ADJUSTABLE_CPU_FREQ) && (NUM_CORES > 1) | ||
429 | corelock_unlock(&cpufreq_cl); | ||
430 | #endif | ||
431 | } | 435 | } |
432 | #endif /* !BOOTLOADER || (SANSA_E200 || SANSA_C200 || PHILIPS_SA9200) */ | 436 | #endif /* !BOOTLOADER || (SANSA_E200 || SANSA_C200 || PHILIPS_SA9200) */ |
433 | 437 | ||
@@ -544,7 +548,6 @@ void system_init(void) | |||
544 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ | 548 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ |
545 | #if NUM_CORES > 1 | 549 | #if NUM_CORES > 1 |
546 | corelock_init(&cpufreq_cl); | 550 | corelock_init(&cpufreq_cl); |
547 | cpu_boost_init(); | ||
548 | #endif | 551 | #endif |
549 | #else | 552 | #else |
550 | pp_set_cpu_frequency(CPUFREQ_MAX); | 553 | pp_set_cpu_frequency(CPUFREQ_MAX); |
diff --git a/firmware/target/arm/pp/system-target.h b/firmware/target/arm/pp/system-target.h index d372b65502..1e947195bd 100644 --- a/firmware/target/arm/pp/system-target.h +++ b/firmware/target/arm/pp/system-target.h | |||
@@ -199,4 +199,21 @@ void system_prepare_fw_start(void); | |||
199 | 199 | ||
200 | #endif /* BOOTLOADER */ | 200 | #endif /* BOOTLOADER */ |
201 | 201 | ||
202 | #if defined(HAVE_ADJUSTABLE_CPU_FREQ) && (NUM_CORES > 1) | ||
203 | #define CPU_BOOST_LOCK_DEFINED | ||
204 | |||
205 | static inline bool cpu_boost_lock(void) | ||
206 | { | ||
207 | void set_cpu_frequency__lock(void); | ||
208 | set_cpu_frequency__lock(); | ||
209 | return true; | ||
210 | } | ||
211 | |||
212 | static inline void cpu_boost_unlock(void) | ||
213 | { | ||
214 | void set_cpu_frequency__unlock(void); | ||
215 | set_cpu_frequency__unlock(); | ||
216 | } | ||
217 | #endif /* HAVE_ADJUSTABLE_CPU_FREQ && NUM_CORES > 1 */ | ||
218 | |||
202 | #endif /* SYSTEM_TARGET_H */ | 219 | #endif /* SYSTEM_TARGET_H */ |