summaryrefslogtreecommitdiff
path: root/firmware/target/arm/philips/sa9200/lcd-sa9200.c
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/target/arm/philips/sa9200/lcd-sa9200.c')
-rwxr-xr-xfirmware/target/arm/philips/sa9200/lcd-sa9200.c109
1 files changed, 75 insertions, 34 deletions
diff --git a/firmware/target/arm/philips/sa9200/lcd-sa9200.c b/firmware/target/arm/philips/sa9200/lcd-sa9200.c
index 2181e26e64..d7fe2e9c12 100755
--- a/firmware/target/arm/philips/sa9200/lcd-sa9200.c
+++ b/firmware/target/arm/philips/sa9200/lcd-sa9200.c
@@ -24,6 +24,44 @@
24#include "kernel.h" 24#include "kernel.h"
25#include "system.h" 25#include "system.h"
26 26
27/* The SA9200 controller closely matches the register defines for the
28 Samsung S6D0151 */
29#define R_START_OSC 0x00
30#define R_DRV_OUTPUT_CONTROL 0x01
31#define R_INVERSION_CONTROL 0x02
32#define R_ENTRY_MODE 0x03
33#define R_DISP_CONTROL 0x07
34#define R_BLANK_PERIOD_CONTROL 0x08
35#define R_FRAME_CYCLE_CONTROL 0x0b
36#define R_EXT_INTERFACE_CONTROL 0x0c
37#define R_POWER_CONTROL1 0x10
38#define R_GAMMA_CONTROL1 0x11
39#define R_POWER_CONTROL2 0x12
40#define R_POWER_CONTROL3 0x13
41#define R_POWER_CONTROL4 0x14
42#define R_RAM_ADDR_SET 0x21
43#define R_WRITE_DATA_2_GRAM 0x22
44#define R_RAM_READ_DATA 0x22
45#define R_GAMMA_FINE_ADJ_POS1 0x30
46#define R_GAMMA_FINE_ADJ_POS2 0x31
47#define R_GAMMA_FINE_ADJ_POS3 0x32
48#define R_GAMMA_GRAD_ADJ_POS 0x33
49#define R_GAMMA_FINE_ADJ_NEG1 0x34
50#define R_GAMMA_FINE_ADJ_NEG2 0x35
51#define R_GAMMA_FINE_ADJ_NEG3 0x36
52#define R_GAMMA_GRAD_ADJ_NEG 0x37
53#define R_GAMMA_CONTROL3 0x38
54#define R_GATE_SCAN_START_POS 0x40
55#define R_1ST_SCR_DRV_POS 0x42
56#define R_2ND_SCR_DRV_POS 0x43
57#define R_HORIZ_RAM_ADDR_POS 0x44
58#define R_VERT_RAM_ADDR_POS 0x45
59#define R_OSC_CONTROL 0x61
60#define R_LOW_POWER_MODE 0x69
61#define R_PRE_DRIVING_PERIOD 0x70
62#define R_GATE_OUT_PERIOD_CTRL 0x71
63#define R_SOFTWARE_RESET 0x72
64
27/* Display status */ 65/* Display status */
28static unsigned lcd_yuv_options SHAREDBSS_ATTR = 0; 66static unsigned lcd_yuv_options SHAREDBSS_ATTR = 0;
29 67
@@ -80,51 +118,54 @@ void lcd_init_device(void)
80 118
81 LCD1_CONTROL |= 0x1; 119 LCD1_CONTROL |= 0x1;
82 120
83 lcd_write_reg(0x0000, 0x0001); 121 lcd_write_reg(R_START_OSC, 0x0001);
84 udelay(50000); 122 udelay(50000);
85 123
86 lcd_write_reg(0x0011, 0x171f); 124 lcd_write_reg(R_GAMMA_CONTROL1, 0x171f);
87 lcd_write_reg(0x0012, 0x0001); 125 lcd_write_reg(R_POWER_CONTROL2, 0x0001);
88 lcd_write_reg(0x0013, 0x08cd); 126 lcd_write_reg(R_POWER_CONTROL3, 0x08cd);
89 lcd_write_reg(0x0014, 0x0416); 127 lcd_write_reg(R_POWER_CONTROL4, 0x0416);
90 lcd_write_reg(0x0010, 0x1208); 128 lcd_write_reg(R_POWER_CONTROL1, 0x1208);
91 udelay(50000); 129 udelay(50000);
92 130
93 lcd_write_reg(0x0013, 0x081C); 131 lcd_write_reg(R_POWER_CONTROL3, 0x081c);
94 udelay(200000); 132 udelay(200000);
95 133
96 lcd_write_reg(0x0001, 0x0a0c); 134 lcd_write_reg(R_DRV_OUTPUT_CONTROL, 0x0a0c);
97 lcd_write_reg(0x0002, 0x0200); 135 lcd_write_reg(R_INVERSION_CONTROL, 0x0200);
98 lcd_write_reg(0x0003, 0x1030); 136 lcd_write_reg(R_ENTRY_MODE, 0x1030);
99 lcd_write_reg(0x0007, 0x0005); 137 lcd_write_reg(R_DISP_CONTROL, 0x0005);
100 lcd_write_reg(0x0008, 0x030a); 138 lcd_write_reg(R_BLANK_PERIOD_CONTROL, 0x030a);
101 lcd_write_reg(0x000b, 0x0000); 139 lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x0000);
102 lcd_write_reg(0x000c, 0x0000); 140 lcd_write_reg(R_EXT_INTERFACE_CONTROL, 0x0000);
103 lcd_write_reg(0x0030, 0x0000); 141
104 lcd_write_reg(0x0031, 0x0204); 142 lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x0000);
105 lcd_write_reg(0x0032, 0x0001); 143 lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0204);
106 lcd_write_reg(0x0033, 0x0600); 144 lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0001);
107 lcd_write_reg(0x0034, 0x0607); 145 lcd_write_reg(R_GAMMA_GRAD_ADJ_POS, 0x0600);
108 lcd_write_reg(0x0035, 0x0305); 146 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG1, 0x0607);
109 lcd_write_reg(0x0036, 0x0707); 147 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG2, 0x0305);
110 lcd_write_reg(0x0037, 0x0006); 148 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG3, 0x0707);
111 lcd_write_reg(0x0038, 0x0400); 149 lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 0x0006);
112 lcd_write_reg(0x0040, 0x0000); 150 lcd_write_reg(R_GAMMA_CONTROL3, 0x0400);
113 lcd_write_reg(0x0042, 0x9f00); 151
114 lcd_write_reg(0x0043, 0x0000); 152 lcd_write_reg(R_GATE_SCAN_START_POS, 0x0000);
115 lcd_write_reg(0x0044, 0x7f00); 153 lcd_write_reg(R_1ST_SCR_DRV_POS, 0x9f00);
116 lcd_write_reg(0x0045, 0x9f00); 154 lcd_write_reg(R_2ND_SCR_DRV_POS, 0x0000);
155 lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 0x7f00);
156 lcd_write_reg(R_VERT_RAM_ADDR_POS, 0x9f00);
157
117 lcd_write_reg(0x00a8, 0x0125); 158 lcd_write_reg(0x00a8, 0x0125);
118 lcd_write_reg(0x00a9, 0x0014); 159 lcd_write_reg(0x00a9, 0x0014);
119 lcd_write_reg(0x00a7, 0x0022); 160 lcd_write_reg(0x00a7, 0x0022);
120 161
121 lcd_write_reg(0x0007, 0x0021); 162 lcd_write_reg(R_DISP_CONTROL, 0x0021);
122 udelay(40000); 163 udelay(40000);
123 lcd_write_reg(0x0007, 0x0023); 164 lcd_write_reg(R_DISP_CONTROL, 0x0023);
124 udelay(40000); 165 udelay(40000);
125 lcd_write_reg(0x0007, 0x1037); 166 lcd_write_reg(R_DISP_CONTROL, 0x1037);
126 167
127 lcd_write_reg(0x0021, 0x0000); 168 lcd_write_reg(R_RAM_ADDR_SET, 0x0000);
128#endif 169#endif
129} 170}
130 171
@@ -195,8 +236,8 @@ void lcd_update_rect(int x, int y, int width, int height)
195 addr = &lcd_framebuffer[y][x]; 236 addr = &lcd_framebuffer[y][x];
196 237
197 do { 238 do {
198 lcd_write_reg(0x0021, ((y++ & 0xff) << 8) | (x & 0xff)); 239 lcd_write_reg(R_RAM_ADDR_SET, ((y++ & 0xff) << 8) | (x & 0xff));
199 lcd_send_command(0x0022); 240 lcd_send_command(R_WRITE_DATA_2_GRAM);
200 241
201 int w = width; 242 int w = width;
202 do { 243 do {