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Diffstat (limited to 'firmware/target/arm/pcm-pp.c')
-rw-r--r--firmware/target/arm/pcm-pp.c56
1 files changed, 4 insertions, 52 deletions
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c
index deaa20b6be..e00b1d7e75 100644
--- a/firmware/target/arm/pcm-pp.c
+++ b/firmware/target/arm/pcm-pp.c
@@ -25,10 +25,7 @@
25#include "audio.h" 25#include "audio.h"
26#include "sound.h" 26#include "sound.h"
27#include "pcm.h" 27#include "pcm.h"
28 28#include "pcm_sampr.h"
29#ifdef HAVE_WM8751
30#define MROBE100_44100HZ (0x40|(0x11 << 1)|1)
31#endif
32 29
33/** DMA **/ 30/** DMA **/
34 31
@@ -87,36 +84,9 @@ static struct dma_data dma_play_data SHAREDBSS_ATTR =
87 .state = 0 84 .state = 0
88}; 85};
89 86
90static unsigned long pcm_freq SHAREDDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */ 87void pcm_dma_apply_settings(void)
91#ifdef HAVE_WM8751
92/* Samplerate control for audio codec */
93static int sr_ctrl = MROBE100_44100HZ;
94#endif
95
96void pcm_set_frequency(unsigned int frequency)
97{
98#if defined(HAVE_WM8731) || defined(HAVE_WM8721)
99 pcm_freq = frequency;
100#else
101 (void)frequency;
102 pcm_freq = HW_SAMPR_DEFAULT;
103#endif
104#ifdef HAVE_WM8751
105 sr_ctrl = MROBE100_44100HZ;
106#endif
107}
108
109void pcm_apply_settings(void)
110{ 88{
111#ifdef HAVE_WM8751 89 audiohw_set_frequency(pcm_fsel);
112 audiohw_set_frequency(sr_ctrl);
113#endif
114
115#if defined(HAVE_WM8711) || defined(HAVE_WM8721) \
116 || defined(HAVE_WM8731)
117 audiohw_set_sample_rate(pcm_freq);
118#endif
119 pcm_curr_sampr = pcm_freq;
120} 90}
121 91
122/* ASM optimised FIQ handler. Checks for the minimum allowed loop cycles by 92/* ASM optimised FIQ handler. Checks for the minimum allowed loop cycles by
@@ -330,9 +300,7 @@ static void play_stop_pcm(void)
330 IIS_IRQTX_REG &= ~IIS_IRQTX; 300 IIS_IRQTX_REG &= ~IIS_IRQTX;
331 301
332 /* Wait for FIFO to empty */ 302 /* Wait for FIFO to empty */
333#ifdef CPU_PP502x 303 while (!IIS_TX_IS_EMPTY);
334 while (IIS_TX_FREE_COUNT < 16);
335#endif
336 304
337 dma_play_data.state = 0; 305 dma_play_data.state = 0;
338} 306}
@@ -397,8 +365,6 @@ void pcm_play_dma_init(void)
397 : [iiscfg]"r"(iiscfg), [dmapd]"r"(dmapd) 365 : [iiscfg]"r"(iiscfg), [dmapd]"r"(dmapd)
398 : "r2"); 366 : "r2");
399 367
400 pcm_set_frequency(SAMPR_44);
401
402 /* Initialize default register values. */ 368 /* Initialize default register values. */
403 audiohw_init(); 369 audiohw_init();
404 370
@@ -620,24 +586,10 @@ void pcm_rec_dma_start(void *addr, size_t size)
620void pcm_rec_dma_close(void) 586void pcm_rec_dma_close(void)
621{ 587{
622 pcm_rec_dma_stop(); 588 pcm_rec_dma_stop();
623
624#if defined(IPOD_COLOR) || defined (IPOD_4G)
625 /* The usual magic from IPL - I'm guessing this configures the headphone
626 socket to be input or output - in this case, output. */
627 GPIO_SET_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
628 GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
629#endif
630} /* pcm_close_recording */ 589} /* pcm_close_recording */
631 590
632void pcm_rec_dma_init(void) 591void pcm_rec_dma_init(void)
633{ 592{
634#if defined(IPOD_COLOR) || defined (IPOD_4G)
635 /* The usual magic from IPL - I'm guessing this configures the headphone
636 socket to be input or output - in this case, input. */
637 GPIO_CLEAR_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
638 GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
639#endif
640
641 pcm_rec_dma_stop(); 593 pcm_rec_dma_stop();
642} /* pcm_init */ 594} /* pcm_init */
643 595