diff options
Diffstat (limited to 'firmware/target/arm/imx31/gigabeat-s/dvfs_dptc_tables-target.h')
| -rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/dvfs_dptc_tables-target.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/dvfs_dptc_tables-target.h b/firmware/target/arm/imx31/gigabeat-s/dvfs_dptc_tables-target.h index 2356e23252..4876736a2b 100644 --- a/firmware/target/arm/imx31/gigabeat-s/dvfs_dptc_tables-target.h +++ b/firmware/target/arm/imx31/gigabeat-s/dvfs_dptc_tables-target.h | |||
| @@ -75,9 +75,6 @@ | |||
| 75 | /* Define mask of which reference circuits are employed for DPTC */ | 75 | /* Define mask of which reference circuits are employed for DPTC */ |
| 76 | #define DPTC_DRCE_MASK (CCM_PMCR0_DRCE1 | CCM_PMCR0_DRCE3) | 76 | #define DPTC_DRCE_MASK (CCM_PMCR0_DRCE1 | CCM_PMCR0_DRCE3) |
| 77 | 77 | ||
| 78 | /* When panicing, this working point is used */ | ||
| 79 | #define DPTC_PANIC_WP | ||
| 80 | |||
| 81 | /* Due to a hardware bug in chip revisions < 2.0, when switching between | 78 | /* Due to a hardware bug in chip revisions < 2.0, when switching between |
| 82 | * Serial and MCU PLLs, DVFS forces the target PLL to go into reset and | 79 | * Serial and MCU PLLs, DVFS forces the target PLL to go into reset and |
| 83 | * relock, only post divider frequency scaling is possible. | 80 | * relock, only post divider frequency scaling is possible. |