diff options
Diffstat (limited to 'firmware/target/arm/imx31/debug-imx31.c')
-rw-r--r-- | firmware/target/arm/imx31/debug-imx31.c | 121 |
1 files changed, 120 insertions, 1 deletions
diff --git a/firmware/target/arm/imx31/debug-imx31.c b/firmware/target/arm/imx31/debug-imx31.c index 94df64b6d7..9fe2eae584 100644 --- a/firmware/target/arm/imx31/debug-imx31.c +++ b/firmware/target/arm/imx31/debug-imx31.c | |||
@@ -27,9 +27,128 @@ | |||
27 | #include "mc13783.h" | 27 | #include "mc13783.h" |
28 | #include "adc.h" | 28 | #include "adc.h" |
29 | 29 | ||
30 | #define CONFIG_CLK32_FREQ 32768 | ||
31 | #define CONFIG_HCLK_FREQ 27000000 | ||
32 | |||
33 | /* Return PLL frequency in HZ */ | ||
34 | static unsigned int decode_pll(unsigned int reg, | ||
35 | unsigned int infreq) | ||
36 | { | ||
37 | uint64_t mfi = (reg >> 10) & 0xf; | ||
38 | uint64_t mfn = reg & 0x3ff; | ||
39 | uint64_t mfd = ((reg >> 16) & 0x3ff) + 1; | ||
40 | uint64_t pd = ((reg >> 26) & 0xf) + 1; | ||
41 | |||
42 | mfi = mfi <= 5 ? 5 : mfi; | ||
43 | |||
44 | return 2*infreq*(mfi * mfd + mfn) / (mfd * pd); | ||
45 | } | ||
46 | |||
47 | /* Get the PLL reference clock frequency */ | ||
48 | static unsigned int get_pll_ref_clk_freq(void) | ||
49 | { | ||
50 | if ((CLKCTL_CCMR & (3 << 1)) == (1 << 1)) | ||
51 | return CONFIG_CLK32_FREQ * 1024; | ||
52 | else | ||
53 | return CONFIG_HCLK_FREQ; | ||
54 | } | ||
55 | |||
30 | bool __dbg_hw_info(void) | 56 | bool __dbg_hw_info(void) |
31 | { | 57 | { |
32 | return false; | 58 | char buf[50]; |
59 | int line; | ||
60 | unsigned int pllref; | ||
61 | unsigned int mcu_pllfreq, ser_pllfreq, usb_pllfreq; | ||
62 | uint32_t mpctl, spctl, upctl; | ||
63 | unsigned int freq; | ||
64 | uint32_t regval; | ||
65 | |||
66 | lcd_setmargins(0, 0); | ||
67 | lcd_clear_display(); | ||
68 | lcd_setfont(FONT_SYSFIXED); | ||
69 | |||
70 | while (1) | ||
71 | { | ||
72 | line = 0; | ||
73 | mpctl = CLKCTL_MPCTL; | ||
74 | spctl = CLKCTL_SPCTL; | ||
75 | upctl = CLKCTL_UPCTL; | ||
76 | |||
77 | pllref = get_pll_ref_clk_freq(); | ||
78 | |||
79 | mcu_pllfreq = decode_pll(mpctl, pllref); | ||
80 | ser_pllfreq = decode_pll(spctl, pllref); | ||
81 | usb_pllfreq = decode_pll(upctl, pllref); | ||
82 | |||
83 | snprintf(buf, sizeof (buf), "pll_ref_clk: %u", pllref); | ||
84 | lcd_puts(0, line++, buf); line++; | ||
85 | |||
86 | /* MCU clock domain */ | ||
87 | snprintf(buf, sizeof (buf), "MPCTL: %08lX", mpctl); | ||
88 | lcd_puts(0, line++, buf); | ||
89 | |||
90 | snprintf(buf, sizeof (buf), " mpl_dpdgck_clk: %u", mcu_pllfreq); | ||
91 | lcd_puts(0, line++, buf); line++; | ||
92 | |||
93 | regval = CLKCTL_PDR0; | ||
94 | snprintf(buf, sizeof (buf), " PDR0: %08lX", regval); | ||
95 | lcd_puts(0, line++, buf); | ||
96 | |||
97 | freq = mcu_pllfreq / (((regval & 0x7) + 1)); | ||
98 | snprintf(buf, sizeof (buf), " mcu_clk: %u", freq); | ||
99 | lcd_puts(0, line++, buf); | ||
100 | |||
101 | freq = mcu_pllfreq / (((regval >> 11) & 0x7) + 1); | ||
102 | snprintf(buf, sizeof (buf), " hsp_clk: %u", freq); | ||
103 | lcd_puts(0, line++, buf); | ||
104 | |||
105 | freq = mcu_pllfreq / (((regval >> 3) & 0x7) + 1); | ||
106 | snprintf(buf, sizeof (buf), " hclk_clk: %u", freq); | ||
107 | lcd_puts(0, line++, buf); | ||
108 | |||
109 | snprintf(buf, sizeof (buf), " ipg_clk: %u", | ||
110 | freq / (unsigned)(((regval >> 6) & 0x3) + 1)); | ||
111 | lcd_puts(0, line++, buf); | ||
112 | |||
113 | snprintf(buf, sizeof (buf), " nfc_clk: %u", | ||
114 | freq / (unsigned)(((regval >> 8) & 0x7) + 1)); | ||
115 | lcd_puts(0, line++, buf); | ||
116 | |||
117 | line++; | ||
118 | |||
119 | /* Serial clock domain */ | ||
120 | snprintf(buf, sizeof (buf), "SPCTL: %08lX", spctl); | ||
121 | lcd_puts(0, line++, buf); | ||
122 | snprintf(buf, sizeof (buf), " spl_dpdgck_clk: %u", ser_pllfreq); | ||
123 | lcd_puts(0, line++, buf); | ||
124 | |||
125 | line++; | ||
126 | |||
127 | /* USB clock domain */ | ||
128 | snprintf(buf, sizeof (buf), "UPCTL: %08lX", upctl); | ||
129 | lcd_puts(0, line++, buf); | ||
130 | |||
131 | snprintf(buf, sizeof (buf), " upl_dpdgck_clk: %u", usb_pllfreq); | ||
132 | lcd_puts(0, line++, buf); line++; | ||
133 | |||
134 | regval = CLKCTL_PDR1; | ||
135 | snprintf(buf, sizeof (buf), " PDR1: %08lX", regval); | ||
136 | lcd_puts(0, line++, buf); | ||
137 | |||
138 | freq = usb_pllfreq / | ||
139 | ((((regval >> 30) & 0x3) + 1) * (((regval >> 27) & 0x7) + 1)); | ||
140 | snprintf(buf, sizeof (buf), " usb_clk: %u", freq); | ||
141 | lcd_puts(0, line++, buf); | ||
142 | |||
143 | freq = usb_pllfreq / (((CLKCTL_PDR0 >> 16) & 0x1f) + 1); | ||
144 | snprintf(buf, sizeof (buf), " ipg_per_baud: %u", freq); | ||
145 | lcd_puts(0, line++, buf); | ||
146 | |||
147 | lcd_update(); | ||
148 | |||
149 | if (button_get(true) == (DEBUG_CANCEL|BUTTON_REL)) | ||
150 | return false; | ||
151 | } | ||
33 | } | 152 | } |
34 | 153 | ||
35 | bool __dbg_ports(void) | 154 | bool __dbg_ports(void) |