diff options
Diffstat (limited to 'firmware/target/arm/imx233/system-imx233.c')
-rw-r--r-- | firmware/target/arm/imx233/system-imx233.c | 122 |
1 files changed, 2 insertions, 120 deletions
diff --git a/firmware/target/arm/imx233/system-imx233.c b/firmware/target/arm/imx233/system-imx233.c index 51eb099709..a06ecab9f5 100644 --- a/firmware/target/arm/imx233/system-imx233.c +++ b/firmware/target/arm/imx233/system-imx233.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include "ssp-imx233.h" | 31 | #include "ssp-imx233.h" |
32 | #include "i2c-imx233.h" | 32 | #include "i2c-imx233.h" |
33 | #include "dcp-imx233.h" | 33 | #include "dcp-imx233.h" |
34 | #include "icoll-imx233.h" | ||
34 | #include "lradc-imx233.h" | 35 | #include "lradc-imx233.h" |
35 | #include "rtc-imx233.h" | 36 | #include "rtc-imx233.h" |
36 | #include "lcd.h" | 37 | #include "lcd.h" |
@@ -38,98 +39,6 @@ | |||
38 | #include "button.h" | 39 | #include "button.h" |
39 | #include "fmradio_i2c.h" | 40 | #include "fmradio_i2c.h" |
40 | 41 | ||
41 | #define default_interrupt(name) \ | ||
42 | extern __attribute__((weak, alias("UIRQ"))) void name(void) | ||
43 | |||
44 | static void UIRQ (void) __attribute__((interrupt ("IRQ"))); | ||
45 | void irq_handler(void) __attribute__((interrupt("IRQ"))); | ||
46 | void fiq_handler(void) __attribute__((interrupt("FIQ"))); | ||
47 | |||
48 | default_interrupt(INT_USB_CTRL); | ||
49 | default_interrupt(INT_TIMER0); | ||
50 | default_interrupt(INT_TIMER1); | ||
51 | default_interrupt(INT_TIMER2); | ||
52 | default_interrupt(INT_TIMER3); | ||
53 | default_interrupt(INT_LCDIF_DMA); | ||
54 | default_interrupt(INT_LCDIF_ERROR); | ||
55 | default_interrupt(INT_SSP1_DMA); | ||
56 | default_interrupt(INT_SSP1_ERROR); | ||
57 | default_interrupt(INT_SSP2_DMA); | ||
58 | default_interrupt(INT_SSP2_ERROR); | ||
59 | default_interrupt(INT_I2C_DMA); | ||
60 | default_interrupt(INT_I2C_ERROR); | ||
61 | default_interrupt(INT_GPIO0); | ||
62 | default_interrupt(INT_GPIO1); | ||
63 | default_interrupt(INT_GPIO2); | ||
64 | default_interrupt(INT_VDD5V); | ||
65 | default_interrupt(INT_LRADC_CH0); | ||
66 | default_interrupt(INT_LRADC_CH1); | ||
67 | default_interrupt(INT_LRADC_CH2); | ||
68 | default_interrupt(INT_LRADC_CH3); | ||
69 | default_interrupt(INT_LRADC_CH4); | ||
70 | default_interrupt(INT_LRADC_CH5); | ||
71 | default_interrupt(INT_LRADC_CH6); | ||
72 | default_interrupt(INT_LRADC_CH7); | ||
73 | default_interrupt(INT_DAC_DMA); | ||
74 | default_interrupt(INT_DAC_ERROR); | ||
75 | default_interrupt(INT_ADC_DMA); | ||
76 | default_interrupt(INT_ADC_ERROR); | ||
77 | default_interrupt(INT_DCP); | ||
78 | |||
79 | typedef void (*isr_t)(void); | ||
80 | |||
81 | static isr_t isr_table[INT_SRC_NR_SOURCES] = | ||
82 | { | ||
83 | [INT_SRC_USB_CTRL] = INT_USB_CTRL, | ||
84 | [INT_SRC_TIMER(0)] = INT_TIMER0, | ||
85 | [INT_SRC_TIMER(1)] = INT_TIMER1, | ||
86 | [INT_SRC_TIMER(2)] = INT_TIMER2, | ||
87 | [INT_SRC_TIMER(3)] = INT_TIMER3, | ||
88 | [INT_SRC_LCDIF_DMA] = INT_LCDIF_DMA, | ||
89 | [INT_SRC_LCDIF_ERROR] = INT_LCDIF_ERROR, | ||
90 | [INT_SRC_SSP1_DMA] = INT_SSP1_DMA, | ||
91 | [INT_SRC_SSP1_ERROR] = INT_SSP1_ERROR, | ||
92 | [INT_SRC_SSP2_DMA] = INT_SSP2_DMA, | ||
93 | [INT_SRC_SSP2_ERROR] = INT_SSP2_ERROR, | ||
94 | [INT_SRC_I2C_DMA] = INT_I2C_DMA, | ||
95 | [INT_SRC_I2C_ERROR] = INT_I2C_ERROR, | ||
96 | [INT_SRC_GPIO0] = INT_GPIO0, | ||
97 | [INT_SRC_GPIO1] = INT_GPIO1, | ||
98 | [INT_SRC_GPIO2] = INT_GPIO2, | ||
99 | [INT_SRC_VDD5V] = INT_VDD5V, | ||
100 | [INT_SRC_LRADC_CHx(0)] = INT_LRADC_CH0, | ||
101 | [INT_SRC_LRADC_CHx(1)] = INT_LRADC_CH1, | ||
102 | [INT_SRC_LRADC_CHx(2)] = INT_LRADC_CH2, | ||
103 | [INT_SRC_LRADC_CHx(3)] = INT_LRADC_CH3, | ||
104 | [INT_SRC_LRADC_CHx(4)] = INT_LRADC_CH4, | ||
105 | [INT_SRC_LRADC_CHx(5)] = INT_LRADC_CH5, | ||
106 | [INT_SRC_LRADC_CHx(6)] = INT_LRADC_CH6, | ||
107 | [INT_SRC_LRADC_CHx(7)] = INT_LRADC_CH7, | ||
108 | [INT_SRC_DAC_DMA] = INT_DAC_DMA, | ||
109 | [INT_SRC_DAC_ERROR] = INT_DAC_ERROR, | ||
110 | [INT_SRC_ADC_DMA] = INT_ADC_DMA, | ||
111 | [INT_SRC_ADC_ERROR] = INT_ADC_ERROR, | ||
112 | [INT_SRC_DCP] = INT_DCP, | ||
113 | }; | ||
114 | |||
115 | static void UIRQ(void) | ||
116 | { | ||
117 | panicf("Unhandled IRQ %02X", | ||
118 | (unsigned int)(HW_ICOLL_VECTOR - (uint32_t)isr_table) / 4); | ||
119 | } | ||
120 | |||
121 | void irq_handler(void) | ||
122 | { | ||
123 | HW_ICOLL_VECTOR = HW_ICOLL_VECTOR; /* notify icoll that we entered ISR */ | ||
124 | (*(isr_t *)HW_ICOLL_VECTOR)(); | ||
125 | /* acknowledge completion of IRQ (all use the same priority 0) */ | ||
126 | HW_ICOLL_LEVELACK = HW_ICOLL_LEVELACK__LEVEL0; | ||
127 | } | ||
128 | |||
129 | void fiq_handler(void) | ||
130 | { | ||
131 | } | ||
132 | |||
133 | void imx233_chip_reset(void) | 42 | void imx233_chip_reset(void) |
134 | { | 43 | { |
135 | HW_CLKCTRL_RESET = HW_CLKCTRL_RESET_CHIP; | 44 | HW_CLKCTRL_RESET = HW_CLKCTRL_RESET_CHIP; |
@@ -164,22 +73,6 @@ int system_memory_guard(int newmode) | |||
164 | return 0; | 73 | return 0; |
165 | } | 74 | } |
166 | 75 | ||
167 | void imx233_enable_interrupt(int src, bool enable) | ||
168 | { | ||
169 | if(enable) | ||
170 | __REG_SET(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__ENABLE; | ||
171 | else | ||
172 | __REG_CLR(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__ENABLE; | ||
173 | } | ||
174 | |||
175 | void imx233_softirq(int src, bool enable) | ||
176 | { | ||
177 | if(enable) | ||
178 | __REG_SET(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__SOFTIRQ; | ||
179 | else | ||
180 | __REG_CLR(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__SOFTIRQ; | ||
181 | } | ||
182 | |||
183 | static void set_page_tables(void) | 76 | static void set_page_tables(void) |
184 | { | 77 | { |
185 | /* map every memory region to itself */ | 78 | /* map every memory region to itself */ |
@@ -199,19 +92,8 @@ void memory_init(void) | |||
199 | 92 | ||
200 | void system_init(void) | 93 | void system_init(void) |
201 | { | 94 | { |
202 | imx233_reset_block(&HW_ICOLL_CTRL); | ||
203 | /* disable all interrupts */ | ||
204 | for(int i = 0; i < INT_SRC_NR_SOURCES; i++) | ||
205 | { | ||
206 | /* priority = 0, disable, disable fiq */ | ||
207 | HW_ICOLL_INTERRUPT(i) = 0; | ||
208 | } | ||
209 | /* setup vbase as isr_table */ | ||
210 | HW_ICOLL_VBASE = (uint32_t)&isr_table; | ||
211 | /* enable final irq bit */ | ||
212 | __REG_SET(HW_ICOLL_CTRL) = HW_ICOLL_CTRL__IRQ_FINAL_ENABLE; | ||
213 | |||
214 | imx233_rtc_init(); | 95 | imx233_rtc_init(); |
96 | imx233_icoll_init(); | ||
215 | imx233_pinctrl_init(); | 97 | imx233_pinctrl_init(); |
216 | imx233_timrot_init(); | 98 | imx233_timrot_init(); |
217 | imx233_dma_init(); | 99 | imx233_dma_init(); |