diff options
Diffstat (limited to 'firmware/target/arm/imx233/regs/stmp3600/regs-spdif.h')
-rw-r--r-- | firmware/target/arm/imx233/regs/stmp3600/regs-spdif.h | 165 |
1 files changed, 165 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/regs/stmp3600/regs-spdif.h b/firmware/target/arm/imx233/regs/stmp3600/regs-spdif.h new file mode 100644 index 0000000000..32e88b37cd --- /dev/null +++ b/firmware/target/arm/imx233/regs/stmp3600/regs-spdif.h | |||
@@ -0,0 +1,165 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * This file was automatically generated by headergen, DO NOT EDIT it. | ||
9 | * headergen version: 2.1.7 | ||
10 | * XML versions: stmp3600:2.3.0 | ||
11 | * | ||
12 | * Copyright (C) 2013 by Amaury Pouly | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or | ||
15 | * modify it under the terms of the GNU General Public License | ||
16 | * as published by the Free Software Foundation; either version 2 | ||
17 | * of the License, or (at your option) any later version. | ||
18 | * | ||
19 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
20 | * KIND, either express or implied. | ||
21 | * | ||
22 | ****************************************************************************/ | ||
23 | #ifndef __HEADERGEN__STMP3600__SPDIF__H__ | ||
24 | #define __HEADERGEN__STMP3600__SPDIF__H__ | ||
25 | |||
26 | #define REGS_SPDIF_BASE (0x80054000) | ||
27 | |||
28 | #define REGS_SPDIF_VERSION "2.3.0" | ||
29 | |||
30 | /** | ||
31 | * Register: HW_SPDIF_CTRL | ||
32 | * Address: 0 | ||
33 | * SCT: yes | ||
34 | */ | ||
35 | #define HW_SPDIF_CTRL (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x0 + 0x0)) | ||
36 | #define HW_SPDIF_CTRL_SET (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x0 + 0x4)) | ||
37 | #define HW_SPDIF_CTRL_CLR (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x0 + 0x8)) | ||
38 | #define HW_SPDIF_CTRL_TOG (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x0 + 0xc)) | ||
39 | #define BP_SPDIF_CTRL_SFTRST 31 | ||
40 | #define BM_SPDIF_CTRL_SFTRST 0x80000000 | ||
41 | #define BF_SPDIF_CTRL_SFTRST(v) (((v) << 31) & 0x80000000) | ||
42 | #define BP_SPDIF_CTRL_CLKGATE 30 | ||
43 | #define BM_SPDIF_CTRL_CLKGATE 0x40000000 | ||
44 | #define BF_SPDIF_CTRL_CLKGATE(v) (((v) << 30) & 0x40000000) | ||
45 | #define BP_SPDIF_CTRL_DMAWAIT_COUNT 16 | ||
46 | #define BM_SPDIF_CTRL_DMAWAIT_COUNT 0x1f0000 | ||
47 | #define BF_SPDIF_CTRL_DMAWAIT_COUNT(v) (((v) << 16) & 0x1f0000) | ||
48 | #define BP_SPDIF_CTRL_WAIT_END_XFER 5 | ||
49 | #define BM_SPDIF_CTRL_WAIT_END_XFER 0x20 | ||
50 | #define BF_SPDIF_CTRL_WAIT_END_XFER(v) (((v) << 5) & 0x20) | ||
51 | #define BP_SPDIF_CTRL_WORD_LENGTH 4 | ||
52 | #define BM_SPDIF_CTRL_WORD_LENGTH 0x10 | ||
53 | #define BF_SPDIF_CTRL_WORD_LENGTH(v) (((v) << 4) & 0x10) | ||
54 | #define BP_SPDIF_CTRL_FIFO_UNDERFLOW_IRQ 3 | ||
55 | #define BM_SPDIF_CTRL_FIFO_UNDERFLOW_IRQ 0x8 | ||
56 | #define BF_SPDIF_CTRL_FIFO_UNDERFLOW_IRQ(v) (((v) << 3) & 0x8) | ||
57 | #define BP_SPDIF_CTRL_FIFO_OVERFLOW_IRQ 2 | ||
58 | #define BM_SPDIF_CTRL_FIFO_OVERFLOW_IRQ 0x4 | ||
59 | #define BF_SPDIF_CTRL_FIFO_OVERFLOW_IRQ(v) (((v) << 2) & 0x4) | ||
60 | #define BP_SPDIF_CTRL_FIFO_ERROR_IRQ_EN 1 | ||
61 | #define BM_SPDIF_CTRL_FIFO_ERROR_IRQ_EN 0x2 | ||
62 | #define BF_SPDIF_CTRL_FIFO_ERROR_IRQ_EN(v) (((v) << 1) & 0x2) | ||
63 | #define BP_SPDIF_CTRL_RUN 0 | ||
64 | #define BM_SPDIF_CTRL_RUN 0x1 | ||
65 | #define BF_SPDIF_CTRL_RUN(v) (((v) << 0) & 0x1) | ||
66 | |||
67 | /** | ||
68 | * Register: HW_SPDIF_STAT | ||
69 | * Address: 0x10 | ||
70 | * SCT: no | ||
71 | */ | ||
72 | #define HW_SPDIF_STAT (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x10)) | ||
73 | #define BP_SPDIF_STAT_PRESENT 31 | ||
74 | #define BM_SPDIF_STAT_PRESENT 0x80000000 | ||
75 | #define BF_SPDIF_STAT_PRESENT(v) (((v) << 31) & 0x80000000) | ||
76 | #define BP_SPDIF_STAT_END_XFER 0 | ||
77 | #define BM_SPDIF_STAT_END_XFER 0x1 | ||
78 | #define BF_SPDIF_STAT_END_XFER(v) (((v) << 0) & 0x1) | ||
79 | |||
80 | /** | ||
81 | * Register: HW_SPDIF_FRAMECTRL | ||
82 | * Address: 0x20 | ||
83 | * SCT: yes | ||
84 | */ | ||
85 | #define HW_SPDIF_FRAMECTRL (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x20 + 0x0)) | ||
86 | #define HW_SPDIF_FRAMECTRL_SET (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x20 + 0x4)) | ||
87 | #define HW_SPDIF_FRAMECTRL_CLR (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x20 + 0x8)) | ||
88 | #define HW_SPDIF_FRAMECTRL_TOG (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x20 + 0xc)) | ||
89 | #define BP_SPDIF_FRAMECTRL_V_CONFIG 17 | ||
90 | #define BM_SPDIF_FRAMECTRL_V_CONFIG 0x20000 | ||
91 | #define BF_SPDIF_FRAMECTRL_V_CONFIG(v) (((v) << 17) & 0x20000) | ||
92 | #define BP_SPDIF_FRAMECTRL_AUTO_MUTE 16 | ||
93 | #define BM_SPDIF_FRAMECTRL_AUTO_MUTE 0x10000 | ||
94 | #define BF_SPDIF_FRAMECTRL_AUTO_MUTE(v) (((v) << 16) & 0x10000) | ||
95 | #define BP_SPDIF_FRAMECTRL_USER_DATA 14 | ||
96 | #define BM_SPDIF_FRAMECTRL_USER_DATA 0x4000 | ||
97 | #define BF_SPDIF_FRAMECTRL_USER_DATA(v) (((v) << 14) & 0x4000) | ||
98 | #define BP_SPDIF_FRAMECTRL_V 13 | ||
99 | #define BM_SPDIF_FRAMECTRL_V 0x2000 | ||
100 | #define BF_SPDIF_FRAMECTRL_V(v) (((v) << 13) & 0x2000) | ||
101 | #define BP_SPDIF_FRAMECTRL_L 12 | ||
102 | #define BM_SPDIF_FRAMECTRL_L 0x1000 | ||
103 | #define BF_SPDIF_FRAMECTRL_L(v) (((v) << 12) & 0x1000) | ||
104 | #define BP_SPDIF_FRAMECTRL_CC 4 | ||
105 | #define BM_SPDIF_FRAMECTRL_CC 0x7f0 | ||
106 | #define BF_SPDIF_FRAMECTRL_CC(v) (((v) << 4) & 0x7f0) | ||
107 | #define BP_SPDIF_FRAMECTRL_PRE 3 | ||
108 | #define BM_SPDIF_FRAMECTRL_PRE 0x8 | ||
109 | #define BF_SPDIF_FRAMECTRL_PRE(v) (((v) << 3) & 0x8) | ||
110 | #define BP_SPDIF_FRAMECTRL_COPY 2 | ||
111 | #define BM_SPDIF_FRAMECTRL_COPY 0x4 | ||
112 | #define BF_SPDIF_FRAMECTRL_COPY(v) (((v) << 2) & 0x4) | ||
113 | #define BP_SPDIF_FRAMECTRL_AUDIO 1 | ||
114 | #define BM_SPDIF_FRAMECTRL_AUDIO 0x2 | ||
115 | #define BF_SPDIF_FRAMECTRL_AUDIO(v) (((v) << 1) & 0x2) | ||
116 | #define BP_SPDIF_FRAMECTRL_PRO 0 | ||
117 | #define BM_SPDIF_FRAMECTRL_PRO 0x1 | ||
118 | #define BF_SPDIF_FRAMECTRL_PRO(v) (((v) << 0) & 0x1) | ||
119 | |||
120 | /** | ||
121 | * Register: HW_SPDIF_SRR | ||
122 | * Address: 0x30 | ||
123 | * SCT: yes | ||
124 | */ | ||
125 | #define HW_SPDIF_SRR (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x30 + 0x0)) | ||
126 | #define HW_SPDIF_SRR_SET (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x30 + 0x4)) | ||
127 | #define HW_SPDIF_SRR_CLR (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x30 + 0x8)) | ||
128 | #define HW_SPDIF_SRR_TOG (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x30 + 0xc)) | ||
129 | #define BP_SPDIF_SRR_BASEMULT 28 | ||
130 | #define BM_SPDIF_SRR_BASEMULT 0x70000000 | ||
131 | #define BF_SPDIF_SRR_BASEMULT(v) (((v) << 28) & 0x70000000) | ||
132 | #define BP_SPDIF_SRR_RATE 0 | ||
133 | #define BM_SPDIF_SRR_RATE 0xfffff | ||
134 | #define BF_SPDIF_SRR_RATE(v) (((v) << 0) & 0xfffff) | ||
135 | |||
136 | /** | ||
137 | * Register: HW_SPDIF_DEBUG | ||
138 | * Address: 0x40 | ||
139 | * SCT: no | ||
140 | */ | ||
141 | #define HW_SPDIF_DEBUG (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x40)) | ||
142 | #define BP_SPDIF_DEBUG_DMA_PREQ 1 | ||
143 | #define BM_SPDIF_DEBUG_DMA_PREQ 0x2 | ||
144 | #define BF_SPDIF_DEBUG_DMA_PREQ(v) (((v) << 1) & 0x2) | ||
145 | #define BP_SPDIF_DEBUG_FIFO_STATUS 0 | ||
146 | #define BM_SPDIF_DEBUG_FIFO_STATUS 0x1 | ||
147 | #define BF_SPDIF_DEBUG_FIFO_STATUS(v) (((v) << 0) & 0x1) | ||
148 | |||
149 | /** | ||
150 | * Register: HW_SPDIF_DATA | ||
151 | * Address: 0x50 | ||
152 | * SCT: yes | ||
153 | */ | ||
154 | #define HW_SPDIF_DATA (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x50 + 0x0)) | ||
155 | #define HW_SPDIF_DATA_SET (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x50 + 0x4)) | ||
156 | #define HW_SPDIF_DATA_CLR (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x50 + 0x8)) | ||
157 | #define HW_SPDIF_DATA_TOG (*(volatile unsigned long *)(REGS_SPDIF_BASE + 0x50 + 0xc)) | ||
158 | #define BP_SPDIF_DATA_HIGH 16 | ||
159 | #define BM_SPDIF_DATA_HIGH 0xffff0000 | ||
160 | #define BF_SPDIF_DATA_HIGH(v) (((v) << 16) & 0xffff0000) | ||
161 | #define BP_SPDIF_DATA_LOW 0 | ||
162 | #define BM_SPDIF_DATA_LOW 0xffff | ||
163 | #define BF_SPDIF_DATA_LOW(v) (((v) << 0) & 0xffff) | ||
164 | |||
165 | #endif /* __HEADERGEN__STMP3600__SPDIF__H__ */ | ||