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Diffstat (limited to 'firmware/target/arm/imx233/regs/stmp3600/regs-apbx.h')
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1 files changed, 276 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/regs/stmp3600/regs-apbx.h b/firmware/target/arm/imx233/regs/stmp3600/regs-apbx.h
new file mode 100644
index 0000000000..fcb9949616
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+++ b/firmware/target/arm/imx233/regs/stmp3600/regs-apbx.h
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1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * This file was automatically generated by headergen, DO NOT EDIT it.
9 * headergen version: 2.1.7
10 * XML versions: stmp3600:2.4.0
11 *
12 * Copyright (C) 2013 by Amaury Pouly
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version 2
17 * of the License, or (at your option) any later version.
18 *
19 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
20 * KIND, either express or implied.
21 *
22 ****************************************************************************/
23#ifndef __HEADERGEN__STMP3600__APBX__H__
24#define __HEADERGEN__STMP3600__APBX__H__
25
26#define REGS_APBX_BASE (0x80024000)
27
28#define REGS_APBX_VERSION "2.4.0"
29
30/**
31 * Register: HW_APBX_CTRL0
32 * Address: 0
33 * SCT: yes
34*/
35#define HW_APBX_CTRL0 (*(volatile unsigned long *)(REGS_APBX_BASE + 0x0 + 0x0))
36#define HW_APBX_CTRL0_SET (*(volatile unsigned long *)(REGS_APBX_BASE + 0x0 + 0x4))
37#define HW_APBX_CTRL0_CLR (*(volatile unsigned long *)(REGS_APBX_BASE + 0x0 + 0x8))
38#define HW_APBX_CTRL0_TOG (*(volatile unsigned long *)(REGS_APBX_BASE + 0x0 + 0xc))
39#define BP_APBX_CTRL0_SFTRST 31
40#define BM_APBX_CTRL0_SFTRST 0x80000000
41#define BF_APBX_CTRL0_SFTRST(v) (((v) << 31) & 0x80000000)
42#define BP_APBX_CTRL0_CLKGATE 30
43#define BM_APBX_CTRL0_CLKGATE 0x40000000
44#define BF_APBX_CTRL0_CLKGATE(v) (((v) << 30) & 0x40000000)
45#define BP_APBX_CTRL0_RESET_CHANNEL 16
46#define BM_APBX_CTRL0_RESET_CHANNEL 0xff0000
47#define BV_APBX_CTRL0_RESET_CHANNEL__AUDIOIN 0x1
48#define BV_APBX_CTRL0_RESET_CHANNEL__AUDIOOUT 0x2
49#define BV_APBX_CTRL0_RESET_CHANNEL__SPDIF_TX 0x4
50#define BV_APBX_CTRL0_RESET_CHANNEL__I2C 0x8
51#define BV_APBX_CTRL0_RESET_CHANNEL__LCDIF 0x10
52#define BV_APBX_CTRL0_RESET_CHANNEL__DRI 0x20
53#define BV_APBX_CTRL0_RESET_CHANNEL__UART_RX 0x30
54#define BV_APBX_CTRL0_RESET_CHANNEL__IRDA_RX 0x30
55#define BV_APBX_CTRL0_RESET_CHANNEL__UART_TX 0x40
56#define BV_APBX_CTRL0_RESET_CHANNEL__IRDA_TX 0x40
57#define BF_APBX_CTRL0_RESET_CHANNEL(v) (((v) << 16) & 0xff0000)
58#define BF_APBX_CTRL0_RESET_CHANNEL_V(v) ((BV_APBX_CTRL0_RESET_CHANNEL__##v << 16) & 0xff0000)
59#define BP_APBX_CTRL0_FREEZE_CHANNEL 0
60#define BM_APBX_CTRL0_FREEZE_CHANNEL 0xff
61#define BV_APBX_CTRL0_FREEZE_CHANNEL__AUDIOIN 0x1
62#define BV_APBX_CTRL0_FREEZE_CHANNEL__AUDIOOUT 0x2
63#define BV_APBX_CTRL0_FREEZE_CHANNEL__SPDIF_TX 0x4
64#define BV_APBX_CTRL0_FREEZE_CHANNEL__I2C 0x8
65#define BV_APBX_CTRL0_FREEZE_CHANNEL__LCDIF 0x10
66#define BV_APBX_CTRL0_FREEZE_CHANNEL__DRI 0x20
67#define BV_APBX_CTRL0_FREEZE_CHANNEL__UART_RX 0x30
68#define BV_APBX_CTRL0_FREEZE_CHANNEL__IRDA_RX 0x30
69#define BV_APBX_CTRL0_FREEZE_CHANNEL__UART_TX 0x40
70#define BV_APBX_CTRL0_FREEZE_CHANNEL__IRDA_TX 0x40
71#define BF_APBX_CTRL0_FREEZE_CHANNEL(v) (((v) << 0) & 0xff)
72#define BF_APBX_CTRL0_FREEZE_CHANNEL_V(v) ((BV_APBX_CTRL0_FREEZE_CHANNEL__##v << 0) & 0xff)
73
74/**
75 * Register: HW_APBX_CTRL1
76 * Address: 0x10
77 * SCT: yes
78*/
79#define HW_APBX_CTRL1 (*(volatile unsigned long *)(REGS_APBX_BASE + 0x10 + 0x0))
80#define HW_APBX_CTRL1_SET (*(volatile unsigned long *)(REGS_APBX_BASE + 0x10 + 0x4))
81#define HW_APBX_CTRL1_CLR (*(volatile unsigned long *)(REGS_APBX_BASE + 0x10 + 0x8))
82#define HW_APBX_CTRL1_TOG (*(volatile unsigned long *)(REGS_APBX_BASE + 0x10 + 0xc))
83#define BP_APBX_CTRL1_CH_CMDCMPLT_IRQ_EN 16
84#define BM_APBX_CTRL1_CH_CMDCMPLT_IRQ_EN 0xff0000
85#define BF_APBX_CTRL1_CH_CMDCMPLT_IRQ_EN(v) (((v) << 16) & 0xff0000)
86#define BP_APBX_CTRL1_CH_CMDCMPLT_IRQ 0
87#define BM_APBX_CTRL1_CH_CMDCMPLT_IRQ 0xff
88#define BF_APBX_CTRL1_CH_CMDCMPLT_IRQ(v) (((v) << 0) & 0xff)
89
90/**
91 * Register: HW_APBX_DEVSEL
92 * Address: 0x20
93 * SCT: no
94*/
95#define HW_APBX_DEVSEL (*(volatile unsigned long *)(REGS_APBX_BASE + 0x20))
96#define BP_APBX_DEVSEL_CH7 28
97#define BM_APBX_DEVSEL_CH7 0xf0000000
98#define BV_APBX_DEVSEL_CH7__USE_UART 0x0
99#define BV_APBX_DEVSEL_CH7__USE_IRDA 0x1
100#define BF_APBX_DEVSEL_CH7(v) (((v) << 28) & 0xf0000000)
101#define BF_APBX_DEVSEL_CH7_V(v) ((BV_APBX_DEVSEL_CH7__##v << 28) & 0xf0000000)
102#define BP_APBX_DEVSEL_CH6 24
103#define BM_APBX_DEVSEL_CH6 0xf000000
104#define BV_APBX_DEVSEL_CH6__USE_UART 0x0
105#define BV_APBX_DEVSEL_CH6__USE_IRDA 0x1
106#define BF_APBX_DEVSEL_CH6(v) (((v) << 24) & 0xf000000)
107#define BF_APBX_DEVSEL_CH6_V(v) ((BV_APBX_DEVSEL_CH6__##v << 24) & 0xf000000)
108#define BP_APBX_DEVSEL_CH5 20
109#define BM_APBX_DEVSEL_CH5 0xf00000
110#define BF_APBX_DEVSEL_CH5(v) (((v) << 20) & 0xf00000)
111#define BP_APBX_DEVSEL_CH4 16
112#define BM_APBX_DEVSEL_CH4 0xf0000
113#define BF_APBX_DEVSEL_CH4(v) (((v) << 16) & 0xf0000)
114#define BP_APBX_DEVSEL_CH3 12
115#define BM_APBX_DEVSEL_CH3 0xf000
116#define BF_APBX_DEVSEL_CH3(v) (((v) << 12) & 0xf000)
117#define BP_APBX_DEVSEL_CH2 8
118#define BM_APBX_DEVSEL_CH2 0xf00
119#define BF_APBX_DEVSEL_CH2(v) (((v) << 8) & 0xf00)
120#define BP_APBX_DEVSEL_CH1 4
121#define BM_APBX_DEVSEL_CH1 0xf0
122#define BF_APBX_DEVSEL_CH1(v) (((v) << 4) & 0xf0)
123#define BP_APBX_DEVSEL_CH0 0
124#define BM_APBX_DEVSEL_CH0 0xf
125#define BF_APBX_DEVSEL_CH0(v) (((v) << 0) & 0xf)
126
127/**
128 * Register: HW_APBX_CHn_NXTCMDAR
129 * Address: 0x40+n*0x70
130 * SCT: no
131*/
132#define HW_APBX_CHn_NXTCMDAR(n) (*(volatile unsigned long *)(REGS_APBX_BASE + 0x40+(n)*0x70))
133#define BP_APBX_CHn_NXTCMDAR_CMD_ADDR 0
134#define BM_APBX_CHn_NXTCMDAR_CMD_ADDR 0xffffffff
135#define BF_APBX_CHn_NXTCMDAR_CMD_ADDR(v) (((v) << 0) & 0xffffffff)
136
137/**
138 * Register: HW_APBX_CHn_DEBUG2
139 * Address: 0x90+n*0x70
140 * SCT: no
141*/
142#define HW_APBX_CHn_DEBUG2(n) (*(volatile unsigned long *)(REGS_APBX_BASE + 0x90+(n)*0x70))
143#define BP_APBX_CHn_DEBUG2_APB_BYTES 16
144#define BM_APBX_CHn_DEBUG2_APB_BYTES 0xffff0000
145#define BF_APBX_CHn_DEBUG2_APB_BYTES(v) (((v) << 16) & 0xffff0000)
146#define BP_APBX_CHn_DEBUG2_AHB_BYTES 0
147#define BM_APBX_CHn_DEBUG2_AHB_BYTES 0xffff
148#define BF_APBX_CHn_DEBUG2_AHB_BYTES(v) (((v) << 0) & 0xffff)
149
150/**
151 * Register: HW_APBX_CHn_BAR
152 * Address: 0x60+n*0x70
153 * SCT: no
154*/
155#define HW_APBX_CHn_BAR(n) (*(volatile unsigned long *)(REGS_APBX_BASE + 0x60+(n)*0x70))
156#define BP_APBX_CHn_BAR_ADDRESS 0
157#define BM_APBX_CHn_BAR_ADDRESS 0xffffffff
158#define BF_APBX_CHn_BAR_ADDRESS(v) (((v) << 0) & 0xffffffff)
159
160/**
161 * Register: HW_APBX_CHn_CMD
162 * Address: 0x50+n*0x70
163 * SCT: no
164*/
165#define HW_APBX_CHn_CMD(n) (*(volatile unsigned long *)(REGS_APBX_BASE + 0x50+(n)*0x70))
166#define BP_APBX_CHn_CMD_XFER_COUNT 16
167#define BM_APBX_CHn_CMD_XFER_COUNT 0xffff0000
168#define BF_APBX_CHn_CMD_XFER_COUNT(v) (((v) << 16) & 0xffff0000)
169#define BP_APBX_CHn_CMD_CMDWORDS 12
170#define BM_APBX_CHn_CMD_CMDWORDS 0xf000
171#define BF_APBX_CHn_CMD_CMDWORDS(v) (((v) << 12) & 0xf000)
172#define BP_APBX_CHn_CMD_WAIT4ENDCMD 7
173#define BM_APBX_CHn_CMD_WAIT4ENDCMD 0x80
174#define BF_APBX_CHn_CMD_WAIT4ENDCMD(v) (((v) << 7) & 0x80)
175#define BP_APBX_CHn_CMD_SEMAPHORE 6
176#define BM_APBX_CHn_CMD_SEMAPHORE 0x40
177#define BF_APBX_CHn_CMD_SEMAPHORE(v) (((v) << 6) & 0x40)
178#define BP_APBX_CHn_CMD_IRQONCMPLT 3
179#define BM_APBX_CHn_CMD_IRQONCMPLT 0x8
180#define BF_APBX_CHn_CMD_IRQONCMPLT(v) (((v) << 3) & 0x8)
181#define BP_APBX_CHn_CMD_CHAIN 2
182#define BM_APBX_CHn_CMD_CHAIN 0x4
183#define BF_APBX_CHn_CMD_CHAIN(v) (((v) << 2) & 0x4)
184#define BP_APBX_CHn_CMD_COMMAND 0
185#define BM_APBX_CHn_CMD_COMMAND 0x3
186#define BV_APBX_CHn_CMD_COMMAND__NO_DMA_XFER 0x0
187#define BV_APBX_CHn_CMD_COMMAND__DMA_WRITE 0x1
188#define BV_APBX_CHn_CMD_COMMAND__DMA_READ 0x2
189#define BF_APBX_CHn_CMD_COMMAND(v) (((v) << 0) & 0x3)
190#define BF_APBX_CHn_CMD_COMMAND_V(v) ((BV_APBX_CHn_CMD_COMMAND__##v << 0) & 0x3)
191
192/**
193 * Register: HW_APBX_CHn_DEBUG1
194 * Address: 0x80+n*0x70
195 * SCT: no
196*/
197#define HW_APBX_CHn_DEBUG1(n) (*(volatile unsigned long *)(REGS_APBX_BASE + 0x80+(n)*0x70))
198#define BP_APBX_CHn_DEBUG1_REQ 31
199#define BM_APBX_CHn_DEBUG1_REQ 0x80000000
200#define BF_APBX_CHn_DEBUG1_REQ(v) (((v) << 31) & 0x80000000)
201#define BP_APBX_CHn_DEBUG1_BURST 30
202#define BM_APBX_CHn_DEBUG1_BURST 0x40000000
203#define BF_APBX_CHn_DEBUG1_BURST(v) (((v) << 30) & 0x40000000)
204#define BP_APBX_CHn_DEBUG1_KICK 29
205#define BM_APBX_CHn_DEBUG1_KICK 0x20000000
206#define BF_APBX_CHn_DEBUG1_KICK(v) (((v) << 29) & 0x20000000)
207#define BP_APBX_CHn_DEBUG1_END 28
208#define BM_APBX_CHn_DEBUG1_END 0x10000000
209#define BF_APBX_CHn_DEBUG1_END(v) (((v) << 28) & 0x10000000)
210#define BP_APBX_CHn_DEBUG1_RSVD2 25
211#define BM_APBX_CHn_DEBUG1_RSVD2 0xe000000
212#define BF_APBX_CHn_DEBUG1_RSVD2(v) (((v) << 25) & 0xe000000)
213#define BP_APBX_CHn_DEBUG1_NEXTCMDADDRVALID 24
214#define BM_APBX_CHn_DEBUG1_NEXTCMDADDRVALID 0x1000000
215#define BF_APBX_CHn_DEBUG1_NEXTCMDADDRVALID(v) (((v) << 24) & 0x1000000)
216#define BP_APBX_CHn_DEBUG1_RD_FIFO_EMPTY 23
217#define BM_APBX_CHn_DEBUG1_RD_FIFO_EMPTY 0x800000
218#define BF_APBX_CHn_DEBUG1_RD_FIFO_EMPTY(v) (((v) << 23) & 0x800000)
219#define BP_APBX_CHn_DEBUG1_RD_FIFO_FULL 22
220#define BM_APBX_CHn_DEBUG1_RD_FIFO_FULL 0x400000
221#define BF_APBX_CHn_DEBUG1_RD_FIFO_FULL(v) (((v) << 22) & 0x400000)
222#define BP_APBX_CHn_DEBUG1_WR_FIFO_EMPTY 21
223#define BM_APBX_CHn_DEBUG1_WR_FIFO_EMPTY 0x200000
224#define BF_APBX_CHn_DEBUG1_WR_FIFO_EMPTY(v) (((v) << 21) & 0x200000)
225#define BP_APBX_CHn_DEBUG1_WR_FIFO_FULL 20
226#define BM_APBX_CHn_DEBUG1_WR_FIFO_FULL 0x100000
227#define BF_APBX_CHn_DEBUG1_WR_FIFO_FULL(v) (((v) << 20) & 0x100000)
228#define BP_APBX_CHn_DEBUG1_RSVD1 5
229#define BM_APBX_CHn_DEBUG1_RSVD1 0xfffe0
230#define BF_APBX_CHn_DEBUG1_RSVD1(v) (((v) << 5) & 0xfffe0)
231#define BP_APBX_CHn_DEBUG1_STATEMACHINE 0
232#define BM_APBX_CHn_DEBUG1_STATEMACHINE 0x1f
233#define BV_APBX_CHn_DEBUG1_STATEMACHINE__IDLE 0x0
234#define BV_APBX_CHn_DEBUG1_STATEMACHINE__REQ_CMD1 0x1
235#define BV_APBX_CHn_DEBUG1_STATEMACHINE__REQ_CMD3 0x2
236#define BV_APBX_CHn_DEBUG1_STATEMACHINE__REQ_CMD2 0x3
237#define BV_APBX_CHn_DEBUG1_STATEMACHINE__XFER_DECODE 0x4
238#define BV_APBX_CHn_DEBUG1_STATEMACHINE__REQ_WAIT 0x5
239#define BV_APBX_CHn_DEBUG1_STATEMACHINE__REQ_CMD4 0x6
240#define BV_APBX_CHn_DEBUG1_STATEMACHINE__PIO_REQ 0x7
241#define BV_APBX_CHn_DEBUG1_STATEMACHINE__READ_FLUSH 0x8
242#define BV_APBX_CHn_DEBUG1_STATEMACHINE__READ_WAIT 0x9
243#define BV_APBX_CHn_DEBUG1_STATEMACHINE__WRITE 0xc
244#define BV_APBX_CHn_DEBUG1_STATEMACHINE__READ_REQ 0xd
245#define BV_APBX_CHn_DEBUG1_STATEMACHINE__CHECK_CHAIN 0xe
246#define BV_APBX_CHn_DEBUG1_STATEMACHINE__XFER_COMPLETE 0xf
247#define BV_APBX_CHn_DEBUG1_STATEMACHINE__WAIT_END 0x15
248#define BV_APBX_CHn_DEBUG1_STATEMACHINE__WRITE_WAIT 0x1c
249#define BV_APBX_CHn_DEBUG1_STATEMACHINE__CHECK_WAIT 0x1e
250#define BF_APBX_CHn_DEBUG1_STATEMACHINE(v) (((v) << 0) & 0x1f)
251#define BF_APBX_CHn_DEBUG1_STATEMACHINE_V(v) ((BV_APBX_CHn_DEBUG1_STATEMACHINE__##v << 0) & 0x1f)
252
253/**
254 * Register: HW_APBX_CHn_SEMA
255 * Address: 0x70+n*0x70
256 * SCT: no
257*/
258#define HW_APBX_CHn_SEMA(n) (*(volatile unsigned long *)(REGS_APBX_BASE + 0x70+(n)*0x70))
259#define BP_APBX_CHn_SEMA_PHORE 16
260#define BM_APBX_CHn_SEMA_PHORE 0xff0000
261#define BF_APBX_CHn_SEMA_PHORE(v) (((v) << 16) & 0xff0000)
262#define BP_APBX_CHn_SEMA_INCREMENT_SEMA 0
263#define BM_APBX_CHn_SEMA_INCREMENT_SEMA 0xff
264#define BF_APBX_CHn_SEMA_INCREMENT_SEMA(v) (((v) << 0) & 0xff)
265
266/**
267 * Register: HW_APBX_CHn_CURCMDAR
268 * Address: 0x30+n*0x70
269 * SCT: no
270*/
271#define HW_APBX_CHn_CURCMDAR(n) (*(volatile unsigned long *)(REGS_APBX_BASE + 0x30+(n)*0x70))
272#define BP_APBX_CHn_CURCMDAR_CMD_ADDR 0
273#define BM_APBX_CHn_CURCMDAR_CMD_ADDR 0xffffffff
274#define BF_APBX_CHn_CURCMDAR_CMD_ADDR(v) (((v) << 0) & 0xffffffff)
275
276#endif /* __HEADERGEN__STMP3600__APBX__H__ */