1 files changed, 368 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/regs/imx233/regs-audioin.h b/firmware/target/arm/imx233/regs/imx233/regs-audioin.h
new file mode 100644
index 0000000000..f2dd252f3a
--- /dev/null
+++ b/firmware/target/arm/imx233/regs/imx233/regs-audioin.h
@@ -0,0 +1,368 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * This file was automatically generated by headergen, DO NOT EDIT it.
+ * headergen version: 2.1.7
+ * XML versions: imx233:3.4.0
+ *
+ * Copyright (C) 2013 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef __HEADERGEN__IMX233__AUDIOIN__H__
+#define __HEADERGEN__IMX233__AUDIOIN__H__
+#define REGS_AUDIOIN_BASE (0x8004c000)
+#define REGS_AUDIOIN_VERSION "3.4.0"
+/**
+ * Register: HW_AUDIOIN_CTRL
+ * Address: 0
+ * SCT: yes
+*/
+#define HW_AUDIOIN_CTRL                         (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x0 + 0x0))
+#define HW_AUDIOIN_CTRL_SET                     (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x0 + 0x4))
+#define HW_AUDIOIN_CTRL_CLR                     (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x0 + 0x8))
+#define HW_AUDIOIN_CTRL_TOG                     (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x0 + 0xc))
+#define BP_AUDIOIN_CTRL_SFTRST                  31
+#define BM_AUDIOIN_CTRL_SFTRST                  0x80000000
+#define BF_AUDIOIN_CTRL_SFTRST(v)               (((v) << 31) & 0x80000000)
+#define BP_AUDIOIN_CTRL_CLKGATE                 30
+#define BM_AUDIOIN_CTRL_CLKGATE                 0x40000000
+#define BF_AUDIOIN_CTRL_CLKGATE(v)              (((v) << 30) & 0x40000000)
+#define BP_AUDIOIN_CTRL_RSRVD3                  21
+#define BM_AUDIOIN_CTRL_RSRVD3                  0x3fe00000
+#define BF_AUDIOIN_CTRL_RSRVD3(v)               (((v) << 21) & 0x3fe00000)
+#define BP_AUDIOIN_CTRL_DMAWAIT_COUNT           16
+#define BM_AUDIOIN_CTRL_DMAWAIT_COUNT           0x1f0000
+#define BF_AUDIOIN_CTRL_DMAWAIT_COUNT(v)        (((v) << 16) & 0x1f0000)
+#define BP_AUDIOIN_CTRL_RSRVD1                  11
+#define BM_AUDIOIN_CTRL_RSRVD1                  0xf800
+#define BF_AUDIOIN_CTRL_RSRVD1(v)               (((v) << 11) & 0xf800)
+#define BP_AUDIOIN_CTRL_LR_SWAP                 10
+#define BM_AUDIOIN_CTRL_LR_SWAP                 0x400
+#define BF_AUDIOIN_CTRL_LR_SWAP(v)              (((v) << 10) & 0x400)
+#define BP_AUDIOIN_CTRL_EDGE_SYNC               9
+#define BM_AUDIOIN_CTRL_EDGE_SYNC               0x200
+#define BF_AUDIOIN_CTRL_EDGE_SYNC(v)            (((v) << 9) & 0x200)
+#define BP_AUDIOIN_CTRL_INVERT_1BIT             8
+#define BM_AUDIOIN_CTRL_INVERT_1BIT             0x100
+#define BF_AUDIOIN_CTRL_INVERT_1BIT(v)          (((v) << 8) & 0x100)
+#define BP_AUDIOIN_CTRL_OFFSET_ENABLE           7
+#define BM_AUDIOIN_CTRL_OFFSET_ENABLE           0x80
+#define BF_AUDIOIN_CTRL_OFFSET_ENABLE(v)        (((v) << 7) & 0x80)
+#define BP_AUDIOIN_CTRL_HPF_ENABLE              6
+#define BM_AUDIOIN_CTRL_HPF_ENABLE              0x40
+#define BF_AUDIOIN_CTRL_HPF_ENABLE(v)           (((v) << 6) & 0x40)
+#define BP_AUDIOIN_CTRL_WORD_LENGTH             5
+#define BM_AUDIOIN_CTRL_WORD_LENGTH             0x20
+#define BF_AUDIOIN_CTRL_WORD_LENGTH(v)          (((v) << 5) & 0x20)
+#define BP_AUDIOIN_CTRL_LOOPBACK                4
+#define BM_AUDIOIN_CTRL_LOOPBACK                0x10
+#define BF_AUDIOIN_CTRL_LOOPBACK(v)             (((v) << 4) & 0x10)
+#define BP_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ      3
+#define BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ      0x8
+#define BF_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ(v)   (((v) << 3) & 0x8)
+#define BP_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ       2
+#define BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ       0x4
+#define BF_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ(v)    (((v) << 2) & 0x4)
+#define BP_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN       1
+#define BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN       0x2
+#define BF_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN(v)    (((v) << 1) & 0x2)
+#define BP_AUDIOIN_CTRL_RUN                     0
+#define BM_AUDIOIN_CTRL_RUN                     0x1
+#define BF_AUDIOIN_CTRL_RUN(v)                  (((v) << 0) & 0x1)
+/**
+ * Register: HW_AUDIOIN_STAT
+ * Address: 0x10
+ * SCT: yes
+*/
+#define HW_AUDIOIN_STAT                 (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x10 + 0x0))
+#define HW_AUDIOIN_STAT_SET             (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x10 + 0x4))
+#define HW_AUDIOIN_STAT_CLR             (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x10 + 0x8))
+#define HW_AUDIOIN_STAT_TOG             (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x10 + 0xc))
+#define BP_AUDIOIN_STAT_ADC_PRESENT     31
+#define BM_AUDIOIN_STAT_ADC_PRESENT     0x80000000
+#define BF_AUDIOIN_STAT_ADC_PRESENT(v)  (((v) << 31) & 0x80000000)
+#define BP_AUDIOIN_STAT_RSRVD3          0
+#define BM_AUDIOIN_STAT_RSRVD3          0x7fffffff
+#define BF_AUDIOIN_STAT_RSRVD3(v)       (((v) << 0) & 0x7fffffff)
+/**
+ * Register: HW_AUDIOIN_ADCSRR
+ * Address: 0x20
+ * SCT: yes
+*/
+#define HW_AUDIOIN_ADCSRR                       (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x20 + 0x0))
+#define HW_AUDIOIN_ADCSRR_SET                   (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x20 + 0x4))
+#define HW_AUDIOIN_ADCSRR_CLR                   (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x20 + 0x8))
+#define HW_AUDIOIN_ADCSRR_TOG                   (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x20 + 0xc))
+#define BP_AUDIOIN_ADCSRR_OSR                   31
+#define BM_AUDIOIN_ADCSRR_OSR                   0x80000000
+#define BV_AUDIOIN_ADCSRR_OSR__OSR6             0x0
+#define BV_AUDIOIN_ADCSRR_OSR__OSR12            0x1
+#define BF_AUDIOIN_ADCSRR_OSR(v)                (((v) << 31) & 0x80000000)
+#define BF_AUDIOIN_ADCSRR_OSR_V(v)              ((BV_AUDIOIN_ADCSRR_OSR__##v << 31) & 0x80000000)
+#define BP_AUDIOIN_ADCSRR_BASEMULT              28
+#define BM_AUDIOIN_ADCSRR_BASEMULT              0x70000000
+#define BV_AUDIOIN_ADCSRR_BASEMULT__SINGLE_RATE 0x1
+#define BV_AUDIOIN_ADCSRR_BASEMULT__DOUBLE_RATE 0x2
+#define BV_AUDIOIN_ADCSRR_BASEMULT__QUAD_RATE   0x4
+#define BF_AUDIOIN_ADCSRR_BASEMULT(v)           (((v) << 28) & 0x70000000)
+#define BF_AUDIOIN_ADCSRR_BASEMULT_V(v)         ((BV_AUDIOIN_ADCSRR_BASEMULT__##v << 28) & 0x70000000)
+#define BP_AUDIOIN_ADCSRR_RSRVD2                27
+#define BM_AUDIOIN_ADCSRR_RSRVD2                0x8000000
+#define BF_AUDIOIN_ADCSRR_RSRVD2(v)             (((v) << 27) & 0x8000000)
+#define BP_AUDIOIN_ADCSRR_SRC_HOLD              24
+#define BM_AUDIOIN_ADCSRR_SRC_HOLD              0x7000000
+#define BF_AUDIOIN_ADCSRR_SRC_HOLD(v)           (((v) << 24) & 0x7000000)
+#define BP_AUDIOIN_ADCSRR_RSRVD1                21
+#define BM_AUDIOIN_ADCSRR_RSRVD1                0xe00000
+#define BF_AUDIOIN_ADCSRR_RSRVD1(v)             (((v) << 21) & 0xe00000)
+#define BP_AUDIOIN_ADCSRR_SRC_INT               16
+#define BM_AUDIOIN_ADCSRR_SRC_INT               0x1f0000
+#define BF_AUDIOIN_ADCSRR_SRC_INT(v)            (((v) << 16) & 0x1f0000)
+#define BP_AUDIOIN_ADCSRR_RSRVD0                13
+#define BM_AUDIOIN_ADCSRR_RSRVD0                0xe000
+#define BF_AUDIOIN_ADCSRR_RSRVD0(v)             (((v) << 13) & 0xe000)
+#define BP_AUDIOIN_ADCSRR_SRC_FRAC              0
+#define BM_AUDIOIN_ADCSRR_SRC_FRAC              0x1fff
+#define BF_AUDIOIN_ADCSRR_SRC_FRAC(v)           (((v) << 0) & 0x1fff)
+/**
+ * Register: HW_AUDIOIN_ADCVOLUME
+ * Address: 0x30
+ * SCT: yes
+*/
+#define HW_AUDIOIN_ADCVOLUME                        (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x30 + 0x0))
+#define HW_AUDIOIN_ADCVOLUME_SET                    (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x30 + 0x4))
+#define HW_AUDIOIN_ADCVOLUME_CLR                    (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x30 + 0x8))
+#define HW_AUDIOIN_ADCVOLUME_TOG                    (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x30 + 0xc))
+#define BP_AUDIOIN_ADCVOLUME_RSRVD5                 29
+#define BM_AUDIOIN_ADCVOLUME_RSRVD5                 0xe0000000
+#define BF_AUDIOIN_ADCVOLUME_RSRVD5(v)              (((v) << 29) & 0xe0000000)
+#define BP_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_LEFT     28
+#define BM_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_LEFT     0x10000000
+#define BF_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_LEFT(v)  (((v) << 28) & 0x10000000)
+#define BP_AUDIOIN_ADCVOLUME_RSRVD4                 26
+#define BM_AUDIOIN_ADCVOLUME_RSRVD4                 0xc000000
+#define BF_AUDIOIN_ADCVOLUME_RSRVD4(v)              (((v) << 26) & 0xc000000)
+#define BP_AUDIOIN_ADCVOLUME_EN_ZCD                 25
+#define BM_AUDIOIN_ADCVOLUME_EN_ZCD                 0x2000000
+#define BF_AUDIOIN_ADCVOLUME_EN_ZCD(v)              (((v) << 25) & 0x2000000)
+#define BP_AUDIOIN_ADCVOLUME_RSRVD3                 24
+#define BM_AUDIOIN_ADCVOLUME_RSRVD3                 0x1000000
+#define BF_AUDIOIN_ADCVOLUME_RSRVD3(v)              (((v) << 24) & 0x1000000)
+#define BP_AUDIOIN_ADCVOLUME_VOLUME_LEFT            16
+#define BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT            0xff0000
+#define BF_AUDIOIN_ADCVOLUME_VOLUME_LEFT(v)         (((v) << 16) & 0xff0000)
+#define BP_AUDIOIN_ADCVOLUME_RSRVD2                 13
+#define BM_AUDIOIN_ADCVOLUME_RSRVD2                 0xe000
+#define BF_AUDIOIN_ADCVOLUME_RSRVD2(v)              (((v) << 13) & 0xe000)
+#define BP_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_RIGHT    12
+#define BM_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_RIGHT    0x1000
+#define BF_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_RIGHT(v) (((v) << 12) & 0x1000)
+#define BP_AUDIOIN_ADCVOLUME_RSRVD1                 8
+#define BM_AUDIOIN_ADCVOLUME_RSRVD1                 0xf00
+#define BF_AUDIOIN_ADCVOLUME_RSRVD1(v)              (((v) << 8) & 0xf00)
+#define BP_AUDIOIN_ADCVOLUME_VOLUME_RIGHT           0
+#define BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT           0xff
+#define BF_AUDIOIN_ADCVOLUME_VOLUME_RIGHT(v)        (((v) << 0) & 0xff)
+/**
+ * Register: HW_AUDIOIN_ADCDEBUG
+ * Address: 0x40
+ * SCT: yes
+*/
+#define HW_AUDIOIN_ADCDEBUG                                     (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x40 + 0x0))
+#define HW_AUDIOIN_ADCDEBUG_SET                                 (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x40 + 0x4))
+#define HW_AUDIOIN_ADCDEBUG_CLR                                 (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x40 + 0x8))
+#define HW_AUDIOIN_ADCDEBUG_TOG                                 (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x40 + 0xc))
+#define BP_AUDIOIN_ADCDEBUG_ENABLE_ADCDMA                       31
+#define BM_AUDIOIN_ADCDEBUG_ENABLE_ADCDMA                       0x80000000
+#define BF_AUDIOIN_ADCDEBUG_ENABLE_ADCDMA(v)                    (((v) << 31) & 0x80000000)
+#define BP_AUDIOIN_ADCDEBUG_RSRVD1                              4
+#define BM_AUDIOIN_ADCDEBUG_RSRVD1                              0x7ffffff0
+#define BF_AUDIOIN_ADCDEBUG_RSRVD1(v)                           (((v) << 4) & 0x7ffffff0)
+#define BP_AUDIOIN_ADCDEBUG_ADC_DMA_REQ_HAND_SHAKE_CLK_CROSS    3
+#define BM_AUDIOIN_ADCDEBUG_ADC_DMA_REQ_HAND_SHAKE_CLK_CROSS    0x8
+#define BF_AUDIOIN_ADCDEBUG_ADC_DMA_REQ_HAND_SHAKE_CLK_CROSS(v) (((v) << 3) & 0x8)
+#define BP_AUDIOIN_ADCDEBUG_SET_INTERRUPT3_HAND_SHAKE           2
+#define BM_AUDIOIN_ADCDEBUG_SET_INTERRUPT3_HAND_SHAKE           0x4
+#define BF_AUDIOIN_ADCDEBUG_SET_INTERRUPT3_HAND_SHAKE(v)        (((v) << 2) & 0x4)
+#define BP_AUDIOIN_ADCDEBUG_DMA_PREQ                            1
+#define BM_AUDIOIN_ADCDEBUG_DMA_PREQ                            0x2
+#define BF_AUDIOIN_ADCDEBUG_DMA_PREQ(v)                         (((v) << 1) & 0x2)
+#define BP_AUDIOIN_ADCDEBUG_FIFO_STATUS                         0
+#define BM_AUDIOIN_ADCDEBUG_FIFO_STATUS                         0x1
+#define BF_AUDIOIN_ADCDEBUG_FIFO_STATUS(v)                      (((v) << 0) & 0x1)
+/**
+ * Register: HW_AUDIOIN_ADCVOL
+ * Address: 0x50
+ * SCT: yes
+*/
+#define HW_AUDIOIN_ADCVOL                           (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x50 + 0x0))
+#define HW_AUDIOIN_ADCVOL_SET                       (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x50 + 0x4))
+#define HW_AUDIOIN_ADCVOL_CLR                       (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x50 + 0x8))
+#define HW_AUDIOIN_ADCVOL_TOG                       (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x50 + 0xc))
+#define BP_AUDIOIN_ADCVOL_RSRVD4                    29
+#define BM_AUDIOIN_ADCVOL_RSRVD4                    0xe0000000
+#define BF_AUDIOIN_ADCVOL_RSRVD4(v)                 (((v) << 29) & 0xe0000000)
+#define BP_AUDIOIN_ADCVOL_VOLUME_UPDATE_PENDING     28
+#define BM_AUDIOIN_ADCVOL_VOLUME_UPDATE_PENDING     0x10000000
+#define BF_AUDIOIN_ADCVOL_VOLUME_UPDATE_PENDING(v)  (((v) << 28) & 0x10000000)
+#define BP_AUDIOIN_ADCVOL_RSRVD3                    26
+#define BM_AUDIOIN_ADCVOL_RSRVD3                    0xc000000
+#define BF_AUDIOIN_ADCVOL_RSRVD3(v)                 (((v) << 26) & 0xc000000)
+#define BP_AUDIOIN_ADCVOL_EN_ADC_ZCD                25
+#define BM_AUDIOIN_ADCVOL_EN_ADC_ZCD                0x2000000
+#define BF_AUDIOIN_ADCVOL_EN_ADC_ZCD(v)             (((v) << 25) & 0x2000000)
+#define BP_AUDIOIN_ADCVOL_MUTE                      24
+#define BM_AUDIOIN_ADCVOL_MUTE                      0x1000000
+#define BF_AUDIOIN_ADCVOL_MUTE(v)                   (((v) << 24) & 0x1000000)
+#define BP_AUDIOIN_ADCVOL_RSRVD2                    14
+#define BM_AUDIOIN_ADCVOL_RSRVD2                    0xffc000
+#define BF_AUDIOIN_ADCVOL_RSRVD2(v)                 (((v) << 14) & 0xffc000)
+#define BP_AUDIOIN_ADCVOL_SELECT_LEFT               12
+#define BM_AUDIOIN_ADCVOL_SELECT_LEFT               0x3000
+#define BF_AUDIOIN_ADCVOL_SELECT_LEFT(v)            (((v) << 12) & 0x3000)
+#define BP_AUDIOIN_ADCVOL_GAIN_LEFT                 8
+#define BM_AUDIOIN_ADCVOL_GAIN_LEFT                 0xf00
+#define BF_AUDIOIN_ADCVOL_GAIN_LEFT(v)              (((v) << 8) & 0xf00)
+#define BP_AUDIOIN_ADCVOL_RSRVD1                    6
+#define BM_AUDIOIN_ADCVOL_RSRVD1                    0xc0
+#define BF_AUDIOIN_ADCVOL_RSRVD1(v)                 (((v) << 6) & 0xc0)
+#define BP_AUDIOIN_ADCVOL_SELECT_RIGHT              4
+#define BM_AUDIOIN_ADCVOL_SELECT_RIGHT              0x30
+#define BF_AUDIOIN_ADCVOL_SELECT_RIGHT(v)           (((v) << 4) & 0x30)
+#define BP_AUDIOIN_ADCVOL_GAIN_RIGHT                0
+#define BM_AUDIOIN_ADCVOL_GAIN_RIGHT                0xf
+#define BF_AUDIOIN_ADCVOL_GAIN_RIGHT(v)             (((v) << 0) & 0xf)
+/**
+ * Register: HW_AUDIOIN_MICLINE
+ * Address: 0x60
+ * SCT: yes
+*/
+#define HW_AUDIOIN_MICLINE                      (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x60 + 0x0))
+#define HW_AUDIOIN_MICLINE_SET                  (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x60 + 0x4))
+#define HW_AUDIOIN_MICLINE_CLR                  (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x60 + 0x8))
+#define HW_AUDIOIN_MICLINE_TOG                  (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x60 + 0xc))
+#define BP_AUDIOIN_MICLINE_RSRVD6               30
+#define BM_AUDIOIN_MICLINE_RSRVD6               0xc0000000
+#define BF_AUDIOIN_MICLINE_RSRVD6(v)            (((v) << 30) & 0xc0000000)
+#define BP_AUDIOIN_MICLINE_DIVIDE_LINE1         29
+#define BM_AUDIOIN_MICLINE_DIVIDE_LINE1         0x20000000
+#define BF_AUDIOIN_MICLINE_DIVIDE_LINE1(v)      (((v) << 29) & 0x20000000)
+#define BP_AUDIOIN_MICLINE_DIVIDE_LINE2         28
+#define BM_AUDIOIN_MICLINE_DIVIDE_LINE2         0x10000000
+#define BF_AUDIOIN_MICLINE_DIVIDE_LINE2(v)      (((v) << 28) & 0x10000000)
+#define BP_AUDIOIN_MICLINE_RSRVD5               25
+#define BM_AUDIOIN_MICLINE_RSRVD5               0xe000000
+#define BF_AUDIOIN_MICLINE_RSRVD5(v)            (((v) << 25) & 0xe000000)
+#define BP_AUDIOIN_MICLINE_MIC_SELECT           24
+#define BM_AUDIOIN_MICLINE_MIC_SELECT           0x1000000
+#define BF_AUDIOIN_MICLINE_MIC_SELECT(v)        (((v) << 24) & 0x1000000)
+#define BP_AUDIOIN_MICLINE_RSRVD4               22
+#define BM_AUDIOIN_MICLINE_RSRVD4               0xc00000
+#define BF_AUDIOIN_MICLINE_RSRVD4(v)            (((v) << 22) & 0xc00000)
+#define BP_AUDIOIN_MICLINE_MIC_RESISTOR         20
+#define BM_AUDIOIN_MICLINE_MIC_RESISTOR         0x300000
+#define BV_AUDIOIN_MICLINE_MIC_RESISTOR__Off    0x0
+#define BV_AUDIOIN_MICLINE_MIC_RESISTOR__2KOhm  0x1
+#define BV_AUDIOIN_MICLINE_MIC_RESISTOR__4KOhm  0x2
+#define BV_AUDIOIN_MICLINE_MIC_RESISTOR__8KOhm  0x3
+#define BF_AUDIOIN_MICLINE_MIC_RESISTOR(v)      (((v) << 20) & 0x300000)
+#define BF_AUDIOIN_MICLINE_MIC_RESISTOR_V(v)    ((BV_AUDIOIN_MICLINE_MIC_RESISTOR__##v << 20) & 0x300000)
+#define BP_AUDIOIN_MICLINE_RSRVD3               19
+#define BM_AUDIOIN_MICLINE_RSRVD3               0x80000
+#define BF_AUDIOIN_MICLINE_RSRVD3(v)            (((v) << 19) & 0x80000)
+#define BP_AUDIOIN_MICLINE_MIC_BIAS             16
+#define BM_AUDIOIN_MICLINE_MIC_BIAS             0x70000
+#define BF_AUDIOIN_MICLINE_MIC_BIAS(v)          (((v) << 16) & 0x70000)
+#define BP_AUDIOIN_MICLINE_RSRVD2               6
+#define BM_AUDIOIN_MICLINE_RSRVD2               0xffc0
+#define BF_AUDIOIN_MICLINE_RSRVD2(v)            (((v) << 6) & 0xffc0)
+#define BP_AUDIOIN_MICLINE_MIC_CHOPCLK          4
+#define BM_AUDIOIN_MICLINE_MIC_CHOPCLK          0x30
+#define BF_AUDIOIN_MICLINE_MIC_CHOPCLK(v)       (((v) << 4) & 0x30)
+#define BP_AUDIOIN_MICLINE_RSRVD1               2
+#define BM_AUDIOIN_MICLINE_RSRVD1               0xc
+#define BF_AUDIOIN_MICLINE_RSRVD1(v)            (((v) << 2) & 0xc)
+#define BP_AUDIOIN_MICLINE_MIC_GAIN             0
+#define BM_AUDIOIN_MICLINE_MIC_GAIN             0x3
+#define BV_AUDIOIN_MICLINE_MIC_GAIN__0dB        0x0
+#define BV_AUDIOIN_MICLINE_MIC_GAIN__20dB       0x1
+#define BV_AUDIOIN_MICLINE_MIC_GAIN__30dB       0x2
+#define BV_AUDIOIN_MICLINE_MIC_GAIN__40dB       0x3
+#define BF_AUDIOIN_MICLINE_MIC_GAIN(v)          (((v) << 0) & 0x3)
+#define BF_AUDIOIN_MICLINE_MIC_GAIN_V(v)        ((BV_AUDIOIN_MICLINE_MIC_GAIN__##v << 0) & 0x3)
+/**
+ * Register: HW_AUDIOIN_ANACLKCTRL
+ * Address: 0x70
+ * SCT: yes
+*/
+#define HW_AUDIOIN_ANACLKCTRL                   (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x70 + 0x0))
+#define HW_AUDIOIN_ANACLKCTRL_SET               (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x70 + 0x4))
+#define HW_AUDIOIN_ANACLKCTRL_CLR               (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x70 + 0x8))
+#define HW_AUDIOIN_ANACLKCTRL_TOG               (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x70 + 0xc))
+#define BP_AUDIOIN_ANACLKCTRL_CLKGATE           31
+#define BM_AUDIOIN_ANACLKCTRL_CLKGATE           0x80000000
+#define BF_AUDIOIN_ANACLKCTRL_CLKGATE(v)        (((v) << 31) & 0x80000000)
+#define BP_AUDIOIN_ANACLKCTRL_RSRVD4            11
+#define BM_AUDIOIN_ANACLKCTRL_RSRVD4            0x7ffff800
+#define BF_AUDIOIN_ANACLKCTRL_RSRVD4(v)         (((v) << 11) & 0x7ffff800)
+#define BP_AUDIOIN_ANACLKCTRL_DITHER_OFF        10
+#define BM_AUDIOIN_ANACLKCTRL_DITHER_OFF        0x400
+#define BF_AUDIOIN_ANACLKCTRL_DITHER_OFF(v)     (((v) << 10) & 0x400)
+#define BP_AUDIOIN_ANACLKCTRL_SLOW_DITHER       9
+#define BM_AUDIOIN_ANACLKCTRL_SLOW_DITHER       0x200
+#define BF_AUDIOIN_ANACLKCTRL_SLOW_DITHER(v)    (((v) << 9) & 0x200)
+#define BP_AUDIOIN_ANACLKCTRL_INVERT_ADCCLK     8
+#define BM_AUDIOIN_ANACLKCTRL_INVERT_ADCCLK     0x100
+#define BF_AUDIOIN_ANACLKCTRL_INVERT_ADCCLK(v)  (((v) << 8) & 0x100)
+#define BP_AUDIOIN_ANACLKCTRL_RSRVD3            6
+#define BM_AUDIOIN_ANACLKCTRL_RSRVD3            0xc0
+#define BF_AUDIOIN_ANACLKCTRL_RSRVD3(v)         (((v) << 6) & 0xc0)
+#define BP_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT      4
+#define BM_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT      0x30
+#define BF_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT(v)   (((v) << 4) & 0x30)
+#define BP_AUDIOIN_ANACLKCTRL_RSRVD2            3
+#define BM_AUDIOIN_ANACLKCTRL_RSRVD2            0x8
+#define BF_AUDIOIN_ANACLKCTRL_RSRVD2(v)         (((v) << 3) & 0x8)
+#define BP_AUDIOIN_ANACLKCTRL_ADCDIV            0
+#define BM_AUDIOIN_ANACLKCTRL_ADCDIV            0x7
+#define BF_AUDIOIN_ANACLKCTRL_ADCDIV(v)         (((v) << 0) & 0x7)
+/**
+ * Register: HW_AUDIOIN_DATA
+ * Address: 0x80
+ * SCT: yes
+*/
+#define HW_AUDIOIN_DATA         (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x80 + 0x0))
+#define HW_AUDIOIN_DATA_SET     (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x80 + 0x4))
+#define HW_AUDIOIN_DATA_CLR     (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x80 + 0x8))
+#define HW_AUDIOIN_DATA_TOG     (*(volatile unsigned long *)(REGS_AUDIOIN_BASE + 0x80 + 0xc))
+#define BP_AUDIOIN_DATA_HIGH    16
+#define BM_AUDIOIN_DATA_HIGH    0xffff0000
+#define BF_AUDIOIN_DATA_HIGH(v) (((v) << 16) & 0xffff0000)
+#define BP_AUDIOIN_DATA_LOW     0
+#define BM_AUDIOIN_DATA_LOW     0xffff
+#define BF_AUDIOIN_DATA_LOW(v)  (((v) << 0) & 0xffff)
+#endif /* __HEADERGEN__IMX233__AUDIOIN__H__ */

diff --git a/firmware/target/arm/imx233/regs/imx233/regs-audioin.h b/firmware/target/arm/imx233/regs/imx233/regs-audioin.h new file mode 100644 index 0000000000..f2dd252f3a --- /dev/null +++ b/firmware/target/arm/imx233/regs/imx233/regs-audioin.h
@@ -0,0 +1,368 @@
	1	/***************************************************************************
	2	* __________ __ ___.
	3	* Open \______ \ ____ ____ \| \| _\_ \|__ _______ ___
	4	* Source \| _// _ \_/ ___\\| \|/ /\| __ \ / _ \ \/ /
	5	* Jukebox \| \| ( <_> ) \___\| < \| \_\ ( <_> > < <
	6	* Firmware \|____\|_ /\____/ \___ >__\|_ \\|___ /\____/__/\_ \
	7	* \/ \/ \/ \/ \/
	8	* This file was automatically generated by headergen, DO NOT EDIT it.
	9	* headergen version: 2.1.7
	10	* XML versions: imx233:3.4.0
	11	*
	12	* Copyright (C) 2013 by Amaury Pouly
	13	*
	14	* This program is free software; you can redistribute it and/or
	15	* modify it under the terms of the GNU General Public License
	16	* as published by the Free Software Foundation; either version 2
	17	* of the License, or (at your option) any later version.
	18	*
	19	* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
	20	* KIND, either express or implied.
	21	*
	22	****************************************************************************/
	23	#ifndef __HEADERGEN__IMX233__AUDIOIN__H__
	24	#define __HEADERGEN__IMX233__AUDIOIN__H__
	25
	26	#define REGS_AUDIOIN_BASE (0x8004c000)
	27
	28	#define REGS_AUDIOIN_VERSION "3.4.0"
	29
	30	/**
	31	* Register: HW_AUDIOIN_CTRL
	32	* Address: 0
	33	* SCT: yes
	34	*/
	35	#define HW_AUDIOIN_CTRL ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x0 + 0x0))
	36	#define HW_AUDIOIN_CTRL_SET ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x0 + 0x4))
	37	#define HW_AUDIOIN_CTRL_CLR ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x0 + 0x8))
	38	#define HW_AUDIOIN_CTRL_TOG ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x0 + 0xc))
	39	#define BP_AUDIOIN_CTRL_SFTRST 31
	40	#define BM_AUDIOIN_CTRL_SFTRST 0x80000000
	41	#define BF_AUDIOIN_CTRL_SFTRST(v) (((v) << 31) & 0x80000000)
	42	#define BP_AUDIOIN_CTRL_CLKGATE 30
	43	#define BM_AUDIOIN_CTRL_CLKGATE 0x40000000
	44	#define BF_AUDIOIN_CTRL_CLKGATE(v) (((v) << 30) & 0x40000000)
	45	#define BP_AUDIOIN_CTRL_RSRVD3 21
	46	#define BM_AUDIOIN_CTRL_RSRVD3 0x3fe00000
	47	#define BF_AUDIOIN_CTRL_RSRVD3(v) (((v) << 21) & 0x3fe00000)
	48	#define BP_AUDIOIN_CTRL_DMAWAIT_COUNT 16
	49	#define BM_AUDIOIN_CTRL_DMAWAIT_COUNT 0x1f0000
	50	#define BF_AUDIOIN_CTRL_DMAWAIT_COUNT(v) (((v) << 16) & 0x1f0000)
	51	#define BP_AUDIOIN_CTRL_RSRVD1 11
	52	#define BM_AUDIOIN_CTRL_RSRVD1 0xf800
	53	#define BF_AUDIOIN_CTRL_RSRVD1(v) (((v) << 11) & 0xf800)
	54	#define BP_AUDIOIN_CTRL_LR_SWAP 10
	55	#define BM_AUDIOIN_CTRL_LR_SWAP 0x400
	56	#define BF_AUDIOIN_CTRL_LR_SWAP(v) (((v) << 10) & 0x400)
	57	#define BP_AUDIOIN_CTRL_EDGE_SYNC 9
	58	#define BM_AUDIOIN_CTRL_EDGE_SYNC 0x200
	59	#define BF_AUDIOIN_CTRL_EDGE_SYNC(v) (((v) << 9) & 0x200)
	60	#define BP_AUDIOIN_CTRL_INVERT_1BIT 8
	61	#define BM_AUDIOIN_CTRL_INVERT_1BIT 0x100
	62	#define BF_AUDIOIN_CTRL_INVERT_1BIT(v) (((v) << 8) & 0x100)
	63	#define BP_AUDIOIN_CTRL_OFFSET_ENABLE 7
	64	#define BM_AUDIOIN_CTRL_OFFSET_ENABLE 0x80
	65	#define BF_AUDIOIN_CTRL_OFFSET_ENABLE(v) (((v) << 7) & 0x80)
	66	#define BP_AUDIOIN_CTRL_HPF_ENABLE 6
	67	#define BM_AUDIOIN_CTRL_HPF_ENABLE 0x40
	68	#define BF_AUDIOIN_CTRL_HPF_ENABLE(v) (((v) << 6) & 0x40)
	69	#define BP_AUDIOIN_CTRL_WORD_LENGTH 5
	70	#define BM_AUDIOIN_CTRL_WORD_LENGTH 0x20
	71	#define BF_AUDIOIN_CTRL_WORD_LENGTH(v) (((v) << 5) & 0x20)
	72	#define BP_AUDIOIN_CTRL_LOOPBACK 4
	73	#define BM_AUDIOIN_CTRL_LOOPBACK 0x10
	74	#define BF_AUDIOIN_CTRL_LOOPBACK(v) (((v) << 4) & 0x10)
	75	#define BP_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ 3
	76	#define BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ 0x8
	77	#define BF_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ(v) (((v) << 3) & 0x8)
	78	#define BP_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ 2
	79	#define BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ 0x4
	80	#define BF_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ(v) (((v) << 2) & 0x4)
	81	#define BP_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN 1
	82	#define BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN 0x2
	83	#define BF_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN(v) (((v) << 1) & 0x2)
	84	#define BP_AUDIOIN_CTRL_RUN 0
	85	#define BM_AUDIOIN_CTRL_RUN 0x1
	86	#define BF_AUDIOIN_CTRL_RUN(v) (((v) << 0) & 0x1)
	87
	88	/**
	89	* Register: HW_AUDIOIN_STAT
	90	* Address: 0x10
	91	* SCT: yes
	92	*/
	93	#define HW_AUDIOIN_STAT ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x10 + 0x0))
	94	#define HW_AUDIOIN_STAT_SET ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x10 + 0x4))
	95	#define HW_AUDIOIN_STAT_CLR ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x10 + 0x8))
	96	#define HW_AUDIOIN_STAT_TOG ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x10 + 0xc))
	97	#define BP_AUDIOIN_STAT_ADC_PRESENT 31
	98	#define BM_AUDIOIN_STAT_ADC_PRESENT 0x80000000
	99	#define BF_AUDIOIN_STAT_ADC_PRESENT(v) (((v) << 31) & 0x80000000)
	100	#define BP_AUDIOIN_STAT_RSRVD3 0
	101	#define BM_AUDIOIN_STAT_RSRVD3 0x7fffffff
	102	#define BF_AUDIOIN_STAT_RSRVD3(v) (((v) << 0) & 0x7fffffff)
	103
	104	/**
	105	* Register: HW_AUDIOIN_ADCSRR
	106	* Address: 0x20
	107	* SCT: yes
	108	*/
	109	#define HW_AUDIOIN_ADCSRR ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x20 + 0x0))
	110	#define HW_AUDIOIN_ADCSRR_SET ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x20 + 0x4))
	111	#define HW_AUDIOIN_ADCSRR_CLR ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x20 + 0x8))
	112	#define HW_AUDIOIN_ADCSRR_TOG ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x20 + 0xc))
	113	#define BP_AUDIOIN_ADCSRR_OSR 31
	114	#define BM_AUDIOIN_ADCSRR_OSR 0x80000000
	115	#define BV_AUDIOIN_ADCSRR_OSR__OSR6 0x0
	116	#define BV_AUDIOIN_ADCSRR_OSR__OSR12 0x1
	117	#define BF_AUDIOIN_ADCSRR_OSR(v) (((v) << 31) & 0x80000000)
	118	#define BF_AUDIOIN_ADCSRR_OSR_V(v) ((BV_AUDIOIN_ADCSRR_OSR__##v << 31) & 0x80000000)
	119	#define BP_AUDIOIN_ADCSRR_BASEMULT 28
	120	#define BM_AUDIOIN_ADCSRR_BASEMULT 0x70000000
	121	#define BV_AUDIOIN_ADCSRR_BASEMULT__SINGLE_RATE 0x1
	122	#define BV_AUDIOIN_ADCSRR_BASEMULT__DOUBLE_RATE 0x2
	123	#define BV_AUDIOIN_ADCSRR_BASEMULT__QUAD_RATE 0x4
	124	#define BF_AUDIOIN_ADCSRR_BASEMULT(v) (((v) << 28) & 0x70000000)
	125	#define BF_AUDIOIN_ADCSRR_BASEMULT_V(v) ((BV_AUDIOIN_ADCSRR_BASEMULT__##v << 28) & 0x70000000)
	126	#define BP_AUDIOIN_ADCSRR_RSRVD2 27
	127	#define BM_AUDIOIN_ADCSRR_RSRVD2 0x8000000
	128	#define BF_AUDIOIN_ADCSRR_RSRVD2(v) (((v) << 27) & 0x8000000)
	129	#define BP_AUDIOIN_ADCSRR_SRC_HOLD 24
	130	#define BM_AUDIOIN_ADCSRR_SRC_HOLD 0x7000000
	131	#define BF_AUDIOIN_ADCSRR_SRC_HOLD(v) (((v) << 24) & 0x7000000)
	132	#define BP_AUDIOIN_ADCSRR_RSRVD1 21
	133	#define BM_AUDIOIN_ADCSRR_RSRVD1 0xe00000
	134	#define BF_AUDIOIN_ADCSRR_RSRVD1(v) (((v) << 21) & 0xe00000)
	135	#define BP_AUDIOIN_ADCSRR_SRC_INT 16
	136	#define BM_AUDIOIN_ADCSRR_SRC_INT 0x1f0000
	137	#define BF_AUDIOIN_ADCSRR_SRC_INT(v) (((v) << 16) & 0x1f0000)
	138	#define BP_AUDIOIN_ADCSRR_RSRVD0 13
	139	#define BM_AUDIOIN_ADCSRR_RSRVD0 0xe000
	140	#define BF_AUDIOIN_ADCSRR_RSRVD0(v) (((v) << 13) & 0xe000)
	141	#define BP_AUDIOIN_ADCSRR_SRC_FRAC 0
	142	#define BM_AUDIOIN_ADCSRR_SRC_FRAC 0x1fff
	143	#define BF_AUDIOIN_ADCSRR_SRC_FRAC(v) (((v) << 0) & 0x1fff)
	144
	145	/**
	146	* Register: HW_AUDIOIN_ADCVOLUME
	147	* Address: 0x30
	148	* SCT: yes
	149	*/
	150	#define HW_AUDIOIN_ADCVOLUME ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x30 + 0x0))
	151	#define HW_AUDIOIN_ADCVOLUME_SET ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x30 + 0x4))
	152	#define HW_AUDIOIN_ADCVOLUME_CLR ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x30 + 0x8))
	153	#define HW_AUDIOIN_ADCVOLUME_TOG ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x30 + 0xc))
	154	#define BP_AUDIOIN_ADCVOLUME_RSRVD5 29
	155	#define BM_AUDIOIN_ADCVOLUME_RSRVD5 0xe0000000
	156	#define BF_AUDIOIN_ADCVOLUME_RSRVD5(v) (((v) << 29) & 0xe0000000)
	157	#define BP_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_LEFT 28
	158	#define BM_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_LEFT 0x10000000
	159	#define BF_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_LEFT(v) (((v) << 28) & 0x10000000)
	160	#define BP_AUDIOIN_ADCVOLUME_RSRVD4 26
	161	#define BM_AUDIOIN_ADCVOLUME_RSRVD4 0xc000000
	162	#define BF_AUDIOIN_ADCVOLUME_RSRVD4(v) (((v) << 26) & 0xc000000)
	163	#define BP_AUDIOIN_ADCVOLUME_EN_ZCD 25
	164	#define BM_AUDIOIN_ADCVOLUME_EN_ZCD 0x2000000
	165	#define BF_AUDIOIN_ADCVOLUME_EN_ZCD(v) (((v) << 25) & 0x2000000)
	166	#define BP_AUDIOIN_ADCVOLUME_RSRVD3 24
	167	#define BM_AUDIOIN_ADCVOLUME_RSRVD3 0x1000000
	168	#define BF_AUDIOIN_ADCVOLUME_RSRVD3(v) (((v) << 24) & 0x1000000)
	169	#define BP_AUDIOIN_ADCVOLUME_VOLUME_LEFT 16
	170	#define BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT 0xff0000
	171	#define BF_AUDIOIN_ADCVOLUME_VOLUME_LEFT(v) (((v) << 16) & 0xff0000)
	172	#define BP_AUDIOIN_ADCVOLUME_RSRVD2 13
	173	#define BM_AUDIOIN_ADCVOLUME_RSRVD2 0xe000
	174	#define BF_AUDIOIN_ADCVOLUME_RSRVD2(v) (((v) << 13) & 0xe000)
	175	#define BP_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_RIGHT 12
	176	#define BM_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_RIGHT 0x1000
	177	#define BF_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_RIGHT(v) (((v) << 12) & 0x1000)
	178	#define BP_AUDIOIN_ADCVOLUME_RSRVD1 8
	179	#define BM_AUDIOIN_ADCVOLUME_RSRVD1 0xf00
	180	#define BF_AUDIOIN_ADCVOLUME_RSRVD1(v) (((v) << 8) & 0xf00)
	181	#define BP_AUDIOIN_ADCVOLUME_VOLUME_RIGHT 0
	182	#define BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT 0xff
	183	#define BF_AUDIOIN_ADCVOLUME_VOLUME_RIGHT(v) (((v) << 0) & 0xff)
	184
	185	/**
	186	* Register: HW_AUDIOIN_ADCDEBUG
	187	* Address: 0x40
	188	* SCT: yes
	189	*/
	190	#define HW_AUDIOIN_ADCDEBUG ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x40 + 0x0))
	191	#define HW_AUDIOIN_ADCDEBUG_SET ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x40 + 0x4))
	192	#define HW_AUDIOIN_ADCDEBUG_CLR ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x40 + 0x8))
	193	#define HW_AUDIOIN_ADCDEBUG_TOG ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x40 + 0xc))
	194	#define BP_AUDIOIN_ADCDEBUG_ENABLE_ADCDMA 31
	195	#define BM_AUDIOIN_ADCDEBUG_ENABLE_ADCDMA 0x80000000
	196	#define BF_AUDIOIN_ADCDEBUG_ENABLE_ADCDMA(v) (((v) << 31) & 0x80000000)
	197	#define BP_AUDIOIN_ADCDEBUG_RSRVD1 4
	198	#define BM_AUDIOIN_ADCDEBUG_RSRVD1 0x7ffffff0
	199	#define BF_AUDIOIN_ADCDEBUG_RSRVD1(v) (((v) << 4) & 0x7ffffff0)
	200	#define BP_AUDIOIN_ADCDEBUG_ADC_DMA_REQ_HAND_SHAKE_CLK_CROSS 3
	201	#define BM_AUDIOIN_ADCDEBUG_ADC_DMA_REQ_HAND_SHAKE_CLK_CROSS 0x8
	202	#define BF_AUDIOIN_ADCDEBUG_ADC_DMA_REQ_HAND_SHAKE_CLK_CROSS(v) (((v) << 3) & 0x8)
	203	#define BP_AUDIOIN_ADCDEBUG_SET_INTERRUPT3_HAND_SHAKE 2
	204	#define BM_AUDIOIN_ADCDEBUG_SET_INTERRUPT3_HAND_SHAKE 0x4
	205	#define BF_AUDIOIN_ADCDEBUG_SET_INTERRUPT3_HAND_SHAKE(v) (((v) << 2) & 0x4)
	206	#define BP_AUDIOIN_ADCDEBUG_DMA_PREQ 1
	207	#define BM_AUDIOIN_ADCDEBUG_DMA_PREQ 0x2
	208	#define BF_AUDIOIN_ADCDEBUG_DMA_PREQ(v) (((v) << 1) & 0x2)
	209	#define BP_AUDIOIN_ADCDEBUG_FIFO_STATUS 0
	210	#define BM_AUDIOIN_ADCDEBUG_FIFO_STATUS 0x1
	211	#define BF_AUDIOIN_ADCDEBUG_FIFO_STATUS(v) (((v) << 0) & 0x1)
	212
	213	/**
	214	* Register: HW_AUDIOIN_ADCVOL
	215	* Address: 0x50
	216	* SCT: yes
	217	*/
	218	#define HW_AUDIOIN_ADCVOL ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x50 + 0x0))
	219	#define HW_AUDIOIN_ADCVOL_SET ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x50 + 0x4))
	220	#define HW_AUDIOIN_ADCVOL_CLR ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x50 + 0x8))
	221	#define HW_AUDIOIN_ADCVOL_TOG ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x50 + 0xc))
	222	#define BP_AUDIOIN_ADCVOL_RSRVD4 29
	223	#define BM_AUDIOIN_ADCVOL_RSRVD4 0xe0000000
	224	#define BF_AUDIOIN_ADCVOL_RSRVD4(v) (((v) << 29) & 0xe0000000)
	225	#define BP_AUDIOIN_ADCVOL_VOLUME_UPDATE_PENDING 28
	226	#define BM_AUDIOIN_ADCVOL_VOLUME_UPDATE_PENDING 0x10000000
	227	#define BF_AUDIOIN_ADCVOL_VOLUME_UPDATE_PENDING(v) (((v) << 28) & 0x10000000)
	228	#define BP_AUDIOIN_ADCVOL_RSRVD3 26
	229	#define BM_AUDIOIN_ADCVOL_RSRVD3 0xc000000
	230	#define BF_AUDIOIN_ADCVOL_RSRVD3(v) (((v) << 26) & 0xc000000)
	231	#define BP_AUDIOIN_ADCVOL_EN_ADC_ZCD 25
	232	#define BM_AUDIOIN_ADCVOL_EN_ADC_ZCD 0x2000000
	233	#define BF_AUDIOIN_ADCVOL_EN_ADC_ZCD(v) (((v) << 25) & 0x2000000)
	234	#define BP_AUDIOIN_ADCVOL_MUTE 24
	235	#define BM_AUDIOIN_ADCVOL_MUTE 0x1000000
	236	#define BF_AUDIOIN_ADCVOL_MUTE(v) (((v) << 24) & 0x1000000)
	237	#define BP_AUDIOIN_ADCVOL_RSRVD2 14
	238	#define BM_AUDIOIN_ADCVOL_RSRVD2 0xffc000
	239	#define BF_AUDIOIN_ADCVOL_RSRVD2(v) (((v) << 14) & 0xffc000)
	240	#define BP_AUDIOIN_ADCVOL_SELECT_LEFT 12
	241	#define BM_AUDIOIN_ADCVOL_SELECT_LEFT 0x3000
	242	#define BF_AUDIOIN_ADCVOL_SELECT_LEFT(v) (((v) << 12) & 0x3000)
	243	#define BP_AUDIOIN_ADCVOL_GAIN_LEFT 8
	244	#define BM_AUDIOIN_ADCVOL_GAIN_LEFT 0xf00
	245	#define BF_AUDIOIN_ADCVOL_GAIN_LEFT(v) (((v) << 8) & 0xf00)
	246	#define BP_AUDIOIN_ADCVOL_RSRVD1 6
	247	#define BM_AUDIOIN_ADCVOL_RSRVD1 0xc0
	248	#define BF_AUDIOIN_ADCVOL_RSRVD1(v) (((v) << 6) & 0xc0)
	249	#define BP_AUDIOIN_ADCVOL_SELECT_RIGHT 4
	250	#define BM_AUDIOIN_ADCVOL_SELECT_RIGHT 0x30
	251	#define BF_AUDIOIN_ADCVOL_SELECT_RIGHT(v) (((v) << 4) & 0x30)
	252	#define BP_AUDIOIN_ADCVOL_GAIN_RIGHT 0
	253	#define BM_AUDIOIN_ADCVOL_GAIN_RIGHT 0xf
	254	#define BF_AUDIOIN_ADCVOL_GAIN_RIGHT(v) (((v) << 0) & 0xf)
	255
	256	/**
	257	* Register: HW_AUDIOIN_MICLINE
	258	* Address: 0x60
	259	* SCT: yes
	260	*/
	261	#define HW_AUDIOIN_MICLINE ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x60 + 0x0))
	262	#define HW_AUDIOIN_MICLINE_SET ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x60 + 0x4))
	263	#define HW_AUDIOIN_MICLINE_CLR ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x60 + 0x8))
	264	#define HW_AUDIOIN_MICLINE_TOG ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x60 + 0xc))
	265	#define BP_AUDIOIN_MICLINE_RSRVD6 30
	266	#define BM_AUDIOIN_MICLINE_RSRVD6 0xc0000000
	267	#define BF_AUDIOIN_MICLINE_RSRVD6(v) (((v) << 30) & 0xc0000000)
	268	#define BP_AUDIOIN_MICLINE_DIVIDE_LINE1 29
	269	#define BM_AUDIOIN_MICLINE_DIVIDE_LINE1 0x20000000
	270	#define BF_AUDIOIN_MICLINE_DIVIDE_LINE1(v) (((v) << 29) & 0x20000000)
	271	#define BP_AUDIOIN_MICLINE_DIVIDE_LINE2 28
	272	#define BM_AUDIOIN_MICLINE_DIVIDE_LINE2 0x10000000
	273	#define BF_AUDIOIN_MICLINE_DIVIDE_LINE2(v) (((v) << 28) & 0x10000000)
	274	#define BP_AUDIOIN_MICLINE_RSRVD5 25
	275	#define BM_AUDIOIN_MICLINE_RSRVD5 0xe000000
	276	#define BF_AUDIOIN_MICLINE_RSRVD5(v) (((v) << 25) & 0xe000000)
	277	#define BP_AUDIOIN_MICLINE_MIC_SELECT 24
	278	#define BM_AUDIOIN_MICLINE_MIC_SELECT 0x1000000
	279	#define BF_AUDIOIN_MICLINE_MIC_SELECT(v) (((v) << 24) & 0x1000000)
	280	#define BP_AUDIOIN_MICLINE_RSRVD4 22
	281	#define BM_AUDIOIN_MICLINE_RSRVD4 0xc00000
	282	#define BF_AUDIOIN_MICLINE_RSRVD4(v) (((v) << 22) & 0xc00000)
	283	#define BP_AUDIOIN_MICLINE_MIC_RESISTOR 20
	284	#define BM_AUDIOIN_MICLINE_MIC_RESISTOR 0x300000
	285	#define BV_AUDIOIN_MICLINE_MIC_RESISTOR__Off 0x0
	286	#define BV_AUDIOIN_MICLINE_MIC_RESISTOR__2KOhm 0x1
	287	#define BV_AUDIOIN_MICLINE_MIC_RESISTOR__4KOhm 0x2
	288	#define BV_AUDIOIN_MICLINE_MIC_RESISTOR__8KOhm 0x3
	289	#define BF_AUDIOIN_MICLINE_MIC_RESISTOR(v) (((v) << 20) & 0x300000)
	290	#define BF_AUDIOIN_MICLINE_MIC_RESISTOR_V(v) ((BV_AUDIOIN_MICLINE_MIC_RESISTOR__##v << 20) & 0x300000)
	291	#define BP_AUDIOIN_MICLINE_RSRVD3 19
	292	#define BM_AUDIOIN_MICLINE_RSRVD3 0x80000
	293	#define BF_AUDIOIN_MICLINE_RSRVD3(v) (((v) << 19) & 0x80000)
	294	#define BP_AUDIOIN_MICLINE_MIC_BIAS 16
	295	#define BM_AUDIOIN_MICLINE_MIC_BIAS 0x70000
	296	#define BF_AUDIOIN_MICLINE_MIC_BIAS(v) (((v) << 16) & 0x70000)
	297	#define BP_AUDIOIN_MICLINE_RSRVD2 6
	298	#define BM_AUDIOIN_MICLINE_RSRVD2 0xffc0
	299	#define BF_AUDIOIN_MICLINE_RSRVD2(v) (((v) << 6) & 0xffc0)
	300	#define BP_AUDIOIN_MICLINE_MIC_CHOPCLK 4
	301	#define BM_AUDIOIN_MICLINE_MIC_CHOPCLK 0x30
	302	#define BF_AUDIOIN_MICLINE_MIC_CHOPCLK(v) (((v) << 4) & 0x30)
	303	#define BP_AUDIOIN_MICLINE_RSRVD1 2
	304	#define BM_AUDIOIN_MICLINE_RSRVD1 0xc
	305	#define BF_AUDIOIN_MICLINE_RSRVD1(v) (((v) << 2) & 0xc)
	306	#define BP_AUDIOIN_MICLINE_MIC_GAIN 0
	307	#define BM_AUDIOIN_MICLINE_MIC_GAIN 0x3
	308	#define BV_AUDIOIN_MICLINE_MIC_GAIN__0dB 0x0
	309	#define BV_AUDIOIN_MICLINE_MIC_GAIN__20dB 0x1
	310	#define BV_AUDIOIN_MICLINE_MIC_GAIN__30dB 0x2
	311	#define BV_AUDIOIN_MICLINE_MIC_GAIN__40dB 0x3
	312	#define BF_AUDIOIN_MICLINE_MIC_GAIN(v) (((v) << 0) & 0x3)
	313	#define BF_AUDIOIN_MICLINE_MIC_GAIN_V(v) ((BV_AUDIOIN_MICLINE_MIC_GAIN__##v << 0) & 0x3)
	314
	315	/**
	316	* Register: HW_AUDIOIN_ANACLKCTRL
	317	* Address: 0x70
	318	* SCT: yes
	319	*/
	320	#define HW_AUDIOIN_ANACLKCTRL ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x70 + 0x0))
	321	#define HW_AUDIOIN_ANACLKCTRL_SET ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x70 + 0x4))
	322	#define HW_AUDIOIN_ANACLKCTRL_CLR ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x70 + 0x8))
	323	#define HW_AUDIOIN_ANACLKCTRL_TOG ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x70 + 0xc))
	324	#define BP_AUDIOIN_ANACLKCTRL_CLKGATE 31
	325	#define BM_AUDIOIN_ANACLKCTRL_CLKGATE 0x80000000
	326	#define BF_AUDIOIN_ANACLKCTRL_CLKGATE(v) (((v) << 31) & 0x80000000)
	327	#define BP_AUDIOIN_ANACLKCTRL_RSRVD4 11
	328	#define BM_AUDIOIN_ANACLKCTRL_RSRVD4 0x7ffff800
	329	#define BF_AUDIOIN_ANACLKCTRL_RSRVD4(v) (((v) << 11) & 0x7ffff800)
	330	#define BP_AUDIOIN_ANACLKCTRL_DITHER_OFF 10
	331	#define BM_AUDIOIN_ANACLKCTRL_DITHER_OFF 0x400
	332	#define BF_AUDIOIN_ANACLKCTRL_DITHER_OFF(v) (((v) << 10) & 0x400)
	333	#define BP_AUDIOIN_ANACLKCTRL_SLOW_DITHER 9
	334	#define BM_AUDIOIN_ANACLKCTRL_SLOW_DITHER 0x200
	335	#define BF_AUDIOIN_ANACLKCTRL_SLOW_DITHER(v) (((v) << 9) & 0x200)
	336	#define BP_AUDIOIN_ANACLKCTRL_INVERT_ADCCLK 8
	337	#define BM_AUDIOIN_ANACLKCTRL_INVERT_ADCCLK 0x100
	338	#define BF_AUDIOIN_ANACLKCTRL_INVERT_ADCCLK(v) (((v) << 8) & 0x100)
	339	#define BP_AUDIOIN_ANACLKCTRL_RSRVD3 6
	340	#define BM_AUDIOIN_ANACLKCTRL_RSRVD3 0xc0
	341	#define BF_AUDIOIN_ANACLKCTRL_RSRVD3(v) (((v) << 6) & 0xc0)
	342	#define BP_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT 4
	343	#define BM_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT 0x30
	344	#define BF_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT(v) (((v) << 4) & 0x30)
	345	#define BP_AUDIOIN_ANACLKCTRL_RSRVD2 3
	346	#define BM_AUDIOIN_ANACLKCTRL_RSRVD2 0x8
	347	#define BF_AUDIOIN_ANACLKCTRL_RSRVD2(v) (((v) << 3) & 0x8)
	348	#define BP_AUDIOIN_ANACLKCTRL_ADCDIV 0
	349	#define BM_AUDIOIN_ANACLKCTRL_ADCDIV 0x7
	350	#define BF_AUDIOIN_ANACLKCTRL_ADCDIV(v) (((v) << 0) & 0x7)
	351
	352	/**
	353	* Register: HW_AUDIOIN_DATA
	354	* Address: 0x80
	355	* SCT: yes
	356	*/
	357	#define HW_AUDIOIN_DATA ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x80 + 0x0))
	358	#define HW_AUDIOIN_DATA_SET ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x80 + 0x4))
	359	#define HW_AUDIOIN_DATA_CLR ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x80 + 0x8))
	360	#define HW_AUDIOIN_DATA_TOG ((volatile unsigned long )(REGS_AUDIOIN_BASE + 0x80 + 0xc))
	361	#define BP_AUDIOIN_DATA_HIGH 16
	362	#define BM_AUDIOIN_DATA_HIGH 0xffff0000
	363	#define BF_AUDIOIN_DATA_HIGH(v) (((v) << 16) & 0xffff0000)
	364	#define BP_AUDIOIN_DATA_LOW 0
	365	#define BM_AUDIOIN_DATA_LOW 0xffff
	366	#define BF_AUDIOIN_DATA_LOW(v) (((v) << 0) & 0xffff)
	367
	368	#endif /* __HEADERGEN__IMX233__AUDIOIN__H__ */