diff options
Diffstat (limited to 'firmware/target/arm/imx233/icoll-imx233.c')
-rw-r--r-- | firmware/target/arm/imx233/icoll-imx233.c | 177 |
1 files changed, 177 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/icoll-imx233.c b/firmware/target/arm/imx233/icoll-imx233.c new file mode 100644 index 0000000000..4e0d525da3 --- /dev/null +++ b/firmware/target/arm/imx233/icoll-imx233.c | |||
@@ -0,0 +1,177 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2012 by amaury Pouly | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #include "icoll-imx233.h" | ||
23 | #include "rtc-imx233.h" | ||
24 | #include "string.h" | ||
25 | |||
26 | #define default_interrupt(name) \ | ||
27 | extern __attribute__((weak, alias("UIRQ"))) void name(void) | ||
28 | |||
29 | static void UIRQ (void) __attribute__((interrupt ("IRQ"))); | ||
30 | void irq_handler(void) __attribute__((interrupt("IRQ"))); | ||
31 | void fiq_handler(void) __attribute__((interrupt("FIQ"))); | ||
32 | |||
33 | default_interrupt(INT_USB_CTRL); | ||
34 | default_interrupt(INT_TIMER0); | ||
35 | default_interrupt(INT_TIMER1); | ||
36 | default_interrupt(INT_TIMER2); | ||
37 | default_interrupt(INT_TIMER3); | ||
38 | default_interrupt(INT_LCDIF_DMA); | ||
39 | default_interrupt(INT_LCDIF_ERROR); | ||
40 | default_interrupt(INT_SSP1_DMA); | ||
41 | default_interrupt(INT_SSP1_ERROR); | ||
42 | default_interrupt(INT_SSP2_DMA); | ||
43 | default_interrupt(INT_SSP2_ERROR); | ||
44 | default_interrupt(INT_I2C_DMA); | ||
45 | default_interrupt(INT_I2C_ERROR); | ||
46 | default_interrupt(INT_GPIO0); | ||
47 | default_interrupt(INT_GPIO1); | ||
48 | default_interrupt(INT_GPIO2); | ||
49 | default_interrupt(INT_VDD5V); | ||
50 | default_interrupt(INT_LRADC_CH0); | ||
51 | default_interrupt(INT_LRADC_CH1); | ||
52 | default_interrupt(INT_LRADC_CH2); | ||
53 | default_interrupt(INT_LRADC_CH3); | ||
54 | default_interrupt(INT_LRADC_CH4); | ||
55 | default_interrupt(INT_LRADC_CH5); | ||
56 | default_interrupt(INT_LRADC_CH6); | ||
57 | default_interrupt(INT_LRADC_CH7); | ||
58 | default_interrupt(INT_DAC_DMA); | ||
59 | default_interrupt(INT_DAC_ERROR); | ||
60 | default_interrupt(INT_ADC_DMA); | ||
61 | default_interrupt(INT_ADC_ERROR); | ||
62 | default_interrupt(INT_DCP); | ||
63 | default_interrupt(INT_TOUCH_DETECT); | ||
64 | |||
65 | void INT_RTC_1MSEC(void); | ||
66 | |||
67 | typedef void (*isr_t)(void); | ||
68 | |||
69 | static isr_t isr_table[INT_SRC_NR_SOURCES] = | ||
70 | { | ||
71 | [INT_SRC_USB_CTRL] = INT_USB_CTRL, | ||
72 | [INT_SRC_TIMER(0)] = INT_TIMER0, | ||
73 | [INT_SRC_TIMER(1)] = INT_TIMER1, | ||
74 | [INT_SRC_TIMER(2)] = INT_TIMER2, | ||
75 | [INT_SRC_TIMER(3)] = INT_TIMER3, | ||
76 | [INT_SRC_LCDIF_DMA] = INT_LCDIF_DMA, | ||
77 | [INT_SRC_LCDIF_ERROR] = INT_LCDIF_ERROR, | ||
78 | [INT_SRC_SSP1_DMA] = INT_SSP1_DMA, | ||
79 | [INT_SRC_SSP1_ERROR] = INT_SSP1_ERROR, | ||
80 | [INT_SRC_SSP2_DMA] = INT_SSP2_DMA, | ||
81 | [INT_SRC_SSP2_ERROR] = INT_SSP2_ERROR, | ||
82 | [INT_SRC_I2C_DMA] = INT_I2C_DMA, | ||
83 | [INT_SRC_I2C_ERROR] = INT_I2C_ERROR, | ||
84 | [INT_SRC_GPIO0] = INT_GPIO0, | ||
85 | [INT_SRC_GPIO1] = INT_GPIO1, | ||
86 | [INT_SRC_GPIO2] = INT_GPIO2, | ||
87 | [INT_SRC_VDD5V] = INT_VDD5V, | ||
88 | [INT_SRC_LRADC_CHx(0)] = INT_LRADC_CH0, | ||
89 | [INT_SRC_LRADC_CHx(1)] = INT_LRADC_CH1, | ||
90 | [INT_SRC_LRADC_CHx(2)] = INT_LRADC_CH2, | ||
91 | [INT_SRC_LRADC_CHx(3)] = INT_LRADC_CH3, | ||
92 | [INT_SRC_LRADC_CHx(4)] = INT_LRADC_CH4, | ||
93 | [INT_SRC_LRADC_CHx(5)] = INT_LRADC_CH5, | ||
94 | [INT_SRC_LRADC_CHx(6)] = INT_LRADC_CH6, | ||
95 | [INT_SRC_LRADC_CHx(7)] = INT_LRADC_CH7, | ||
96 | [INT_SRC_DAC_DMA] = INT_DAC_DMA, | ||
97 | [INT_SRC_DAC_ERROR] = INT_DAC_ERROR, | ||
98 | [INT_SRC_ADC_DMA] = INT_ADC_DMA, | ||
99 | [INT_SRC_ADC_ERROR] = INT_ADC_ERROR, | ||
100 | [INT_SRC_DCP] = INT_DCP, | ||
101 | [INT_SRC_TOUCH_DETECT] = INT_TOUCH_DETECT, | ||
102 | [INT_SRC_RTC_1MSEC] = INT_RTC_1MSEC, | ||
103 | }; | ||
104 | |||
105 | #define IRQ_STORM_DELAY 1000 /* ms */ | ||
106 | #define IRQ_STORM_THRESHOLD 100000 /* allows irq / delay */ | ||
107 | |||
108 | static uint32_t irq_count_old[INT_SRC_NR_SOURCES]; | ||
109 | static uint32_t irq_count[INT_SRC_NR_SOURCES]; | ||
110 | |||
111 | struct imx233_icoll_irq_info_t imx233_icoll_get_irq_info(int src) | ||
112 | { | ||
113 | struct imx233_icoll_irq_info_t info; | ||
114 | info.enabled = !!(HW_ICOLL_INTERRUPT(src) & HW_ICOLL_INTERRUPT__ENABLE); | ||
115 | info.freq = irq_count_old[src]; | ||
116 | return info; | ||
117 | } | ||
118 | |||
119 | void INT_RTC_1MSEC(void) | ||
120 | { | ||
121 | static unsigned counter = 0; | ||
122 | if(counter++ >= IRQ_STORM_DELAY) | ||
123 | { | ||
124 | counter = 0; | ||
125 | memcpy(irq_count_old, irq_count, sizeof(irq_count)); | ||
126 | memset(irq_count, 0, sizeof(irq_count)); | ||
127 | } | ||
128 | imx233_rtc_clear_msec_irq(); | ||
129 | } | ||
130 | |||
131 | static void UIRQ(void) | ||
132 | { | ||
133 | panicf("Unhandled IRQ %02X", | ||
134 | (unsigned int)(HW_ICOLL_VECTOR - (uint32_t)isr_table) / 4); | ||
135 | } | ||
136 | |||
137 | void irq_handler(void) | ||
138 | { | ||
139 | HW_ICOLL_VECTOR = HW_ICOLL_VECTOR; /* notify icoll that we entered ISR */ | ||
140 | int irq_nr = (HW_ICOLL_VECTOR - HW_ICOLL_VBASE) / 4; | ||
141 | if(irq_count[irq_nr]++ > IRQ_STORM_THRESHOLD) | ||
142 | panicf("IRQ %d: storm detected", irq_nr); | ||
143 | (*(isr_t *)HW_ICOLL_VECTOR)(); | ||
144 | /* acknowledge completion of IRQ (all use the same priority 0) */ | ||
145 | HW_ICOLL_LEVELACK = HW_ICOLL_LEVELACK__LEVEL0; | ||
146 | } | ||
147 | |||
148 | void fiq_handler(void) | ||
149 | { | ||
150 | } | ||
151 | |||
152 | void imx233_icoll_enable_interrupt(int src, bool enable) | ||
153 | { | ||
154 | if(enable) | ||
155 | __REG_SET(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__ENABLE; | ||
156 | else | ||
157 | __REG_CLR(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__ENABLE; | ||
158 | } | ||
159 | |||
160 | void imx233_icoll_init(void) | ||
161 | { | ||
162 | imx233_reset_block(&HW_ICOLL_CTRL); | ||
163 | /* disable all interrupts */ | ||
164 | for(int i = 0; i < INT_SRC_NR_SOURCES; i++) | ||
165 | { | ||
166 | /* priority = 0, disable, disable fiq */ | ||
167 | HW_ICOLL_INTERRUPT(i) = 0; | ||
168 | } | ||
169 | /* setup vbase as isr_table */ | ||
170 | HW_ICOLL_VBASE = (uint32_t)&isr_table; | ||
171 | /* enable final irq bit */ | ||
172 | __REG_SET(HW_ICOLL_CTRL) = HW_ICOLL_CTRL__IRQ_FINAL_ENABLE; | ||
173 | |||
174 | imx233_rtc_enable_msec_irq(true); | ||
175 | imx233_icoll_enable_interrupt(INT_SRC_RTC_1MSEC, true); | ||
176 | } | ||
177 | |||