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Diffstat (limited to 'firmware/target/arm/crt0.S')
-rw-r--r--firmware/target/arm/crt0.S83
1 files changed, 14 insertions, 69 deletions
diff --git a/firmware/target/arm/crt0.S b/firmware/target/arm/crt0.S
index 6def9a1a88..f52056617a 100644
--- a/firmware/target/arm/crt0.S
+++ b/firmware/target/arm/crt0.S
@@ -26,23 +26,14 @@
26 .global start 26 .global start
27start: 27start:
28 /* Exception vectors */ 28 /* Exception vectors */
29 ldr pc, [pc, #24] 29 b newstart
30 ldr pc, [pc, #24] 30 b undef_instr_handler
31 ldr pc, [pc, #24] 31 b software_int_handler
32 ldr pc, [pc, #24] 32 b prefetch_abort_handler
33 ldr pc, [pc, #24] 33 b data_abort_handler
34 ldr pc, [pc, #24] 34 b reserved_handler
35 ldr pc, [pc, #24] 35 b irq_handler
36 ldr pc, [pc, #24] 36 b fiq_handler
37
38.word newstart
39.word undef_instr_handler
40.word software_int_handler
41.word prefetch_abort_handler
42.word data_abort_handler
43.word reserved_handler
44.word irq_handler
45.word fiq_handler
46 37
47_vectorsend: 38_vectorsend:
48 39
@@ -51,56 +42,11 @@ _vectorsend:
51newstart: 42newstart:
52 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */ 43 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
53 44
54#if (CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2) && !defined(BOOTLOADER) 45#if CONFIG_CPU == AS3525 || CONFIG_CPU == AS3525v2
55 46 bl memory_init
56#define CACHE_NONE 0 47#endif
57#define CACHE_ALL 0x0C
58#define UNCACHED_ADDR(a) (a + 0x10000000)
59
60 /* Setup MMU : has to be done before accessing IRAM ! */
61
62 bl ttb_init
63
64 mov r0, #0 @ physical address
65 mov r1, #0 @ virtual address
66 mov r2, #0x1000 @ size (all memory)
67 mov r3, #CACHE_NONE
68 bl map_section
69
70 mov r0, #0 @ physical address
71 ldr r1, =IRAM_ORIG @ virtual address
72 mov r2, #1 @ size : 1MB
73 mov r3, #CACHE_ALL
74 bl map_section
75
76 mov r0, #0 @ physical address
77 ldr r1, =UNCACHED_ADDR(IRAM_ORIG) @ virtual address
78 mov r2, #1 @ size : 1MB
79 mov r3, #CACHE_NONE
80 bl map_section
81
82 mov r0, #0x30000000 @ physical address
83 mov r1, #DRAM_ORIG @ virtual address
84 mov r2, #MEMORYSIZE @ size
85 mov r3, #CACHE_ALL
86 bl map_section
87
88 mov r0, #0x30000000 @ physical address
89 mov r1, #UNCACHED_ADDR(DRAM_ORIG) @ virtual address
90 mov r2, #MEMORYSIZE @ size
91 mov r3, #CACHE_NONE
92 bl map_section
93
94 /* map 1st mbyte of DRAM at 0x0 to have exception vectors available */
95
96 mov r0, #0x30000000 @ physical address
97 mov r1, #0 @ virtual address
98 mov r2, #1 @ size
99 mov r3, #CACHE_ALL
100 bl map_section
101
102 bl enable_mmu
103 48
49#ifdef USE_IRAM
104 /* Zero out IBSS */ 50 /* Zero out IBSS */
105 ldr r2, =_iedata 51 ldr r2, =_iedata
106 ldr r3, =_iend 52 ldr r3, =_iend
@@ -120,7 +66,6 @@ newstart:
120 ldrhi r5, [r2], #4 66 ldrhi r5, [r2], #4
121 strhi r5, [r3], #4 67 strhi r5, [r3], #4
122 bhi 1b 68 bhi 1b
123
124#endif 69#endif
125 70
126#ifdef HAVE_INIT_ATTR 71#ifdef HAVE_INIT_ATTR
@@ -173,8 +118,8 @@ newstart:
173 118
174 /* Switch back to supervisor mode */ 119 /* Switch back to supervisor mode */
175 msr cpsr_c, #0xd3 120 msr cpsr_c, #0xd3
176 bl main 121 ldr ip, =main @ make sure we are using the virtual address
177 122 bx ip
178 123
179/* All illegal exceptions call into UIE with exception address as first 124/* All illegal exceptions call into UIE with exception address as first
180 * parameter. This is calculated differently depending on which exception 125 * parameter. This is calculated differently depending on which exception