1 files changed, 91 insertions, 0 deletions
diff --git a/firmware/target/arm/as3525/usb-drv-as3525v2.h b/firmware/target/arm/as3525/usb-drv-as3525v2.h
new file mode 100644
index 0000000000..4abbdb7dc2
--- /dev/null
+++ b/firmware/target/arm/as3525/usb-drv-as3525v2.h
@@ -0,0 +1,91 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright © 2010 Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef __USB_DRV_AS3525v2_H__
+#define __USB_DRV_AS3525v2_H__
+#include "as3525v2.h"
+#define USB_DEVICE                  (USB_BASE + 0x0800)   /** USB Device base address */
+/**
+ * Core Global Registers
+ */
+#define USB_GOTGCTL     (*(volatile unsigned long *)(USB_BASE + 0x000)) /** OTG Control and Status Register */
+#define USB_GOTGINT     (*(volatile unsigned long *)(USB_BASE + 0x004)) /** OTG Interrupt Register */
+#define USB_GAHBCFG     (*(volatile unsigned long *)(USB_BASE + 0x008)) /** Core AHB Configuration Register */
+#define USB_GUSBCFG     (*(volatile unsigned long *)(USB_BASE + 0x00C)) /** Core USB Configuration Register */
+#define USB_GRSTCTL     (*(volatile unsigned long *)(USB_BASE + 0x010)) /** Core Reset Register */
+#define USB_GINTSTS     (*(volatile unsigned long *)(USB_BASE + 0x014)) /** Core Interrupt Register */
+#define USB_GINTMSK     (*(volatile unsigned long *)(USB_BASE + 0x018)) /** Core Interrupt Mask Register */
+#define USB_GRXSTSR     (*(volatile unsigned long *)(USB_BASE + 0x01C)) /** Receive Status Debug Read Register (Read Only) */
+#define USB_GRXSTSP     (*(volatile unsigned long *)(USB_BASE + 0x020)) /** Receive Status Read /Pop Register (Read Only) */
+#define USB_GRXFSIZ     (*(volatile unsigned long *)(USB_BASE + 0x024)) /** Receive FIFO Size Register */
+#define USB_GNPTXFSIZ   (*(volatile unsigned long *)(USB_BASE + 0x028)) /** Periodic Transmit FIFO Size Register */
+#define USB_GNPTXSTS    (*(volatile unsigned long *)(USB_BASE + 0x02C)) /** Non-Periodic Transmit FIFO/Queue Status Register */
+#define USB_GI2CCTL     (*(volatile unsigned long *)(USB_BASE + 0x030)) /** I2C Access Register */
+#define USB_GPVNDCTL    (*(volatile unsigned long *)(USB_BASE + 0x034)) /** PHY Vendor Control Register */
+#define USB_GGPIO       (*(volatile unsigned long *)(USB_BASE + 0x038)) /** General Purpose Input/Output Register */
+#define USB_GUID        (*(volatile unsigned long *)(USB_BASE + 0x03C)) /** User ID Register */
+#define USB_GSNPSID     (*(volatile unsigned long *)(USB_BASE + 0x040)) /** Synopsys ID Register */
+#define USB_GHWCFG1     (*(volatile unsigned long *)(USB_BASE + 0x044)) /** User HW Config1 Register */
+#define USB_GHWCFG2     (*(volatile unsigned long *)(USB_BASE + 0x048)) /** User HW Config2 Register */
+#define USB_GHWCFG3     (*(volatile unsigned long *)(USB_BASE + 0x04C)) /** User HW Config3 Register */
+#define USB_GHWCFG4     (*(volatile unsigned long *)(USB_BASE + 0x050)) /** User HW Config4 Register */
+#define USB_GRSTCTL_csftrst                 (1 << 0) /** Core soft reset */
+#define USB_GRSTCTL_hsftrst                 (1 << 1) /** Hclk soft reset */
+#define USB_GRSTCTL_ahbidle                 (1 << 31) /** AHB idle state*/
+#define USB_GHWCFG1_IN_EP(ep)               ((USB_GHWCFG1 >> ((ep) *2)) & 0x1) /** 1 if EP(ep) has in cap */
+#define USB_GHWCFG1_OUT_EP(ep)              ((USB_GHWCFG1 >> ((ep) *2 + 1)) & 0x1)/** 1 if EP(ep) has out cap */
+#define USB_GHWCFG3_DFIFO_LEN               (USB_GHWCFG3 >> 16) /** Total fifo size */
+#define USB_GHWCFG4_NUM_IN_EP               ((USB_GHWCFG4 >> 26) & 0xf) /** Number of IN endpoints */
+#define USB_GHWCFG2_NUM_EP                  ((USB_GHWCFG2 >> 10) & 0xf) /** Number of endpoints */
+#define USB_GUSBCFG_ulpi_utmi_sel           (1 << 4) /** select ulpi:1 or utmi:0 */
+#define USB_GUSBCFG_phy_if                  (1 << 3) /** select utmi bus width ? */
+#define USB_GUSBCFG_SRP_cap                 0x100
+#define USB_GUSBCFG_HNP_cap                 0x200
+#define USB_GAHBCFG_hburstlen_bit_pos       1
+#define USB_GAHBCFG_INT_DMA_BURST_INCR      1 /** note: the linux patch has several other value, this is one picked for internal dma */
+#define USB_GAHBCFG_dma_enable              (1 << 5)
+/**
+ * Device Registers Base Addresses
+ */
+#define USB_DCFG        (*(volatile unsigned long *)(USB_DEVICE + 0x00)) /** Device Configuration Register */
+#define USB_DCTL        (*(volatile unsigned long *)(USB_DEVICE + 0x04)) /** Device Control Register */
+#define USB_DSTS        (*(volatile unsigned long *)(USB_DEVICE + 0x08)) /** Device Status Register */
+#define USB_DIEPMSK     (*(volatile unsigned long *)(USB_DEVICE + 0x10)) /** Device IN Endpoint Common Interrupt Mask Register */
+#define USB_DOEPMSK     (*(volatile unsigned long *)(USB_DEVICE + 0x14)) /** Device OUT Endpoint Common Interrupt Mask Register */
+#define USB_DAINT       (*(volatile unsigned long *)(USB_DEVICE + 0x18)) /** Device All Endpoints Interrupt Register */
+#define USB_DAINTMSK    (*(volatile unsigned long *)(USB_DEVICE + 0x1C)) /** Device Endpoints Interrupt Mask Register */
+#define USB_DTKNQR1     (*(volatile unsigned long *)(USB_DEVICE + 0x20)) /** Device IN Token Sequence Learning Queue Read Register 1 */
+#define USB_DTKNQR2     (*(volatile unsigned long *)(USB_DEVICE + 0x24)) /** Device IN Token Sequence Learning Queue Register 2 */
+#define USB_DTKNQP      (*(volatile unsigned long *)(USB_DEVICE + 0x28)) /** Device IN Token Queue Pop register */
+#define USB_PCGCCTL     (*(volatile unsigned long *)(USB_BASE + 0xE00)) /** Power and Clock Gating Control Register */
+#endif /* __USB_DRV_AS3525v2_H__ */

diff --git a/firmware/target/arm/as3525/usb-drv-as3525v2.h b/firmware/target/arm/as3525/usb-drv-as3525v2.h new file mode 100644 index 0000000000..4abbdb7dc2 --- /dev/null +++ b/firmware/target/arm/as3525/usb-drv-as3525v2.h
@@ -0,0 +1,91 @@
	1	/***************************************************************************
	2	* __________ __ ___.
	3	* Open \______ \ ____ ____ \| \| _\_ \|__ _______ ___
	4	* Source \| _// _ \_/ ___\\| \|/ /\| __ \ / _ \ \/ /
	5	* Jukebox \| \| ( <_> ) \___\| < \| \_\ ( <_> > < <
	6	* Firmware \|____\|_ /\____/ \___ >__\|_ \\|___ /\____/__/\_ \
	7	* \/ \/ \/ \/ \/
	8	* $Id$
	9	*
	10	* Copyright © 2010 Amaury Pouly
	11	*
	12	* This program is free software; you can redistribute it and/or
	13	* modify it under the terms of the GNU General Public License
	14	* as published by the Free Software Foundation; either version 2
	15	* of the License, or (at your option) any later version.
	16	*
	17	* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
	18	* KIND, either express or implied.
	19	*
	20	****************************************************************************/
	21	#ifndef __USB_DRV_AS3525v2_H__
	22	#define __USB_DRV_AS3525v2_H__
	23
	24	#include "as3525v2.h"
	25
	26	#define USB_DEVICE (USB_BASE + 0x0800) /** USB Device base address */
	27
	28	/**
	29	* Core Global Registers
	30	*/
	31	#define USB_GOTGCTL ((volatile unsigned long )(USB_BASE + 0x000)) /** OTG Control and Status Register */
	32	#define USB_GOTGINT ((volatile unsigned long )(USB_BASE + 0x004)) /** OTG Interrupt Register */
	33	#define USB_GAHBCFG ((volatile unsigned long )(USB_BASE + 0x008)) /** Core AHB Configuration Register */
	34	#define USB_GUSBCFG ((volatile unsigned long )(USB_BASE + 0x00C)) /** Core USB Configuration Register */
	35	#define USB_GRSTCTL ((volatile unsigned long )(USB_BASE + 0x010)) /** Core Reset Register */
	36	#define USB_GINTSTS ((volatile unsigned long )(USB_BASE + 0x014)) /** Core Interrupt Register */
	37	#define USB_GINTMSK ((volatile unsigned long )(USB_BASE + 0x018)) /** Core Interrupt Mask Register */
	38	#define USB_GRXSTSR ((volatile unsigned long )(USB_BASE + 0x01C)) /** Receive Status Debug Read Register (Read Only) */
	39	#define USB_GRXSTSP ((volatile unsigned long )(USB_BASE + 0x020)) /** Receive Status Read /Pop Register (Read Only) */
	40	#define USB_GRXFSIZ ((volatile unsigned long )(USB_BASE + 0x024)) /** Receive FIFO Size Register */
	41	#define USB_GNPTXFSIZ ((volatile unsigned long )(USB_BASE + 0x028)) /** Periodic Transmit FIFO Size Register */
	42	#define USB_GNPTXSTS ((volatile unsigned long )(USB_BASE + 0x02C)) /** Non-Periodic Transmit FIFO/Queue Status Register */
	43	#define USB_GI2CCTL ((volatile unsigned long )(USB_BASE + 0x030)) /** I2C Access Register */
	44	#define USB_GPVNDCTL ((volatile unsigned long )(USB_BASE + 0x034)) /** PHY Vendor Control Register */
	45	#define USB_GGPIO ((volatile unsigned long )(USB_BASE + 0x038)) /** General Purpose Input/Output Register */
	46	#define USB_GUID ((volatile unsigned long )(USB_BASE + 0x03C)) /** User ID Register */
	47	#define USB_GSNPSID ((volatile unsigned long )(USB_BASE + 0x040)) /** Synopsys ID Register */
	48	#define USB_GHWCFG1 ((volatile unsigned long )(USB_BASE + 0x044)) /** User HW Config1 Register */
	49	#define USB_GHWCFG2 ((volatile unsigned long )(USB_BASE + 0x048)) /** User HW Config2 Register */
	50	#define USB_GHWCFG3 ((volatile unsigned long )(USB_BASE + 0x04C)) /** User HW Config3 Register */
	51	#define USB_GHWCFG4 ((volatile unsigned long )(USB_BASE + 0x050)) /** User HW Config4 Register */
	52
	53	#define USB_GRSTCTL_csftrst (1 << 0) /** Core soft reset */
	54	#define USB_GRSTCTL_hsftrst (1 << 1) /** Hclk soft reset */
	55	#define USB_GRSTCTL_ahbidle (1 << 31) /** AHB idle state*/
	56
	57	#define USB_GHWCFG1_IN_EP(ep) ((USB_GHWCFG1 >> ((ep) 2)) & 0x1) /* 1 if EP(ep) has in cap */
	58	#define USB_GHWCFG1_OUT_EP(ep) ((USB_GHWCFG1 >> ((ep) 2 + 1)) & 0x1)/* 1 if EP(ep) has out cap */
	59
	60	#define USB_GHWCFG3_DFIFO_LEN (USB_GHWCFG3 >> 16) /** Total fifo size */
	61
	62	#define USB_GHWCFG4_NUM_IN_EP ((USB_GHWCFG4 >> 26) & 0xf) /** Number of IN endpoints */
	63
	64	#define USB_GHWCFG2_NUM_EP ((USB_GHWCFG2 >> 10) & 0xf) /** Number of endpoints */
	65
	66	#define USB_GUSBCFG_ulpi_utmi_sel (1 << 4) /** select ulpi:1 or utmi:0 */
	67	#define USB_GUSBCFG_phy_if (1 << 3) /** select utmi bus width ? */
	68	#define USB_GUSBCFG_SRP_cap 0x100
	69	#define USB_GUSBCFG_HNP_cap 0x200
	70
	71	#define USB_GAHBCFG_hburstlen_bit_pos 1
	72	#define USB_GAHBCFG_INT_DMA_BURST_INCR 1 /** note: the linux patch has several other value, this is one picked for internal dma */
	73	#define USB_GAHBCFG_dma_enable (1 << 5)
	74
	75	/**
	76	* Device Registers Base Addresses
	77	*/
	78	#define USB_DCFG ((volatile unsigned long )(USB_DEVICE + 0x00)) /** Device Configuration Register */
	79	#define USB_DCTL ((volatile unsigned long )(USB_DEVICE + 0x04)) /** Device Control Register */
	80	#define USB_DSTS ((volatile unsigned long )(USB_DEVICE + 0x08)) /** Device Status Register */
	81	#define USB_DIEPMSK ((volatile unsigned long )(USB_DEVICE + 0x10)) /** Device IN Endpoint Common Interrupt Mask Register */
	82	#define USB_DOEPMSK ((volatile unsigned long )(USB_DEVICE + 0x14)) /** Device OUT Endpoint Common Interrupt Mask Register */
	83	#define USB_DAINT ((volatile unsigned long )(USB_DEVICE + 0x18)) /** Device All Endpoints Interrupt Register */
	84	#define USB_DAINTMSK ((volatile unsigned long )(USB_DEVICE + 0x1C)) /** Device Endpoints Interrupt Mask Register */
	85	#define USB_DTKNQR1 ((volatile unsigned long )(USB_DEVICE + 0x20)) /** Device IN Token Sequence Learning Queue Read Register 1 */
	86	#define USB_DTKNQR2 ((volatile unsigned long )(USB_DEVICE + 0x24)) /** Device IN Token Sequence Learning Queue Register 2 */
	87	#define USB_DTKNQP ((volatile unsigned long )(USB_DEVICE + 0x28)) /** Device IN Token Queue Pop register */
	88
	89	#define USB_PCGCCTL ((volatile unsigned long )(USB_BASE + 0xE00)) /** Power and Clock Gating Control Register */
	90
	91	#endif /* __USB_DRV_AS3525v2_H__ */