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path: root/firmware/target/arm/as3525/usb-drv-as3525v2.c
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Diffstat (limited to 'firmware/target/arm/as3525/usb-drv-as3525v2.c')
-rw-r--r--firmware/target/arm/as3525/usb-drv-as3525v2.c343
1 files changed, 240 insertions, 103 deletions
diff --git a/firmware/target/arm/as3525/usb-drv-as3525v2.c b/firmware/target/arm/as3525/usb-drv-as3525v2.c
index 98805ca578..db79ac4d20 100644
--- a/firmware/target/arm/as3525/usb-drv-as3525v2.c
+++ b/firmware/target/arm/as3525/usb-drv-as3525v2.c
@@ -25,8 +25,12 @@
25#include "clock-target.h" 25#include "clock-target.h"
26#include "ascodec.h" 26#include "ascodec.h"
27#include "as3514.h" 27#include "as3514.h"
28#include <stdbool.h> 28#include "stdbool.h"
29#include "string.h"
30#include "stdio.h"
29#include "panic.h" 31#include "panic.h"
32#include "mmu-arm.h"
33#include "system.h"
30#define LOGF_ENABLE 34#define LOGF_ENABLE
31#include "logf.h" 35#include "logf.h"
32#include "usb-drv-as3525v2.h" 36#include "usb-drv-as3525v2.h"
@@ -47,9 +51,11 @@ struct usb_endpoint
47#if 0 51#if 0
48static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS*2]; 52static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS*2];
49#endif 53#endif
54static struct usb_ctrlrequest ep0_setup_pkt;
50 55
51void usb_attach(void) 56void usb_attach(void)
52{ 57{
58 logf("usb: attach");
53 usb_enable(true); 59 usb_enable(true);
54} 60}
55 61
@@ -79,7 +85,7 @@ static void as3525v2_connect(void)
79 USB_PCGCCTL &= ~0x8; 85 USB_PCGCCTL &= ~0x8;
80 usb_delay(); 86 usb_delay();
81 /* 6) set "power on program done" */ 87 /* 6) set "power on program done" */
82 USB_DCTL |= 0x800; 88 USB_DCTL |= USB_DCTL_pwronprgdone;
83 usb_delay(); 89 usb_delay();
84 /* 7) core soft reset */ 90 /* 7) core soft reset */
85 USB_GRSTCTL |= USB_GRSTCTL_csftrst; 91 USB_GRSTCTL |= USB_GRSTCTL_csftrst;
@@ -91,8 +97,8 @@ static void as3525v2_connect(void)
91 USB_GRSTCTL |= 0x3f; 97 USB_GRSTCTL |= 0x3f;
92 usb_delay(); 98 usb_delay();
93 /* 10) force device mode*/ 99 /* 10) force device mode*/
94 USB_GUSBCFG &= ~0x20000000; 100 USB_GUSBCFG &= ~USB_GUSBCFG_force_host_mode;
95 USB_GUSBCFG |= 0x40000000; 101 USB_GUSBCFG |= USB_GUSBCFG_force_device_mode;
96 usb_delay(); 102 usb_delay();
97 /* 11) Do something that is probably CCU related but undocumented*/ 103 /* 11) Do something that is probably CCU related but undocumented*/
98 CCU_USB_THINGY &= ~0x1000; 104 CCU_USB_THINGY &= ~0x1000;
@@ -111,14 +117,9 @@ static void usb_enable_common_interrupts(void)
111 /* Clear any pending interrupt */ 117 /* Clear any pending interrupt */
112 USB_GINTSTS = 0Xffffffff; 118 USB_GINTSTS = 0Xffffffff;
113 /* Enable interrupts */ 119 /* Enable interrupts */
114 USB_GINTMSK |= USB_GINTMSK_modemismatch | 120 USB_GINTMSK = USB_GINTMSK_otgintr
115 USB_GINTMSK_otgintr | 121 | USB_GINTMSK_conidstschng
116 USB_GINTMSK_rxstsqlvl | /* for dma */ 122 | USB_GINTMSK_disconnect;
117 USB_GINTMSK_conidstschng |
118 USB_GINTMSK_wkupintr |
119 USB_GINTMSK_disconnect |
120 USB_GINTMSK_usbsuspend |
121 USB_GINTMSK_sessreqintr;
122} 123}
123 124
124static void usb_enable_device_interrupts(void) 125static void usb_enable_device_interrupts(void)
@@ -130,20 +131,10 @@ static void usb_enable_device_interrupts(void)
130 /* Enable common interrupts */ 131 /* Enable common interrupts */
131 usb_enable_common_interrupts(); 132 usb_enable_common_interrupts();
132 /* Enable interrupts */ 133 /* Enable interrupts */
133 USB_GINTMSK |= 134 USB_GINTMSK |= USB_GINTMSK_usbreset
134 USB_GINTMSK_usb_rst 135 | USB_GINTMSK_enumdone
135 | USB_GINTMSK_enumdone 136 | USB_GINTMSK_inepintr
136 | USB_GINTMSK_inepintr 137 | USB_GINTMSK_outepintr;
137 | USB_GINTMSK_outepintr
138 | USB_GINTMSK_erlysuspend
139 | USB_GINTMSK_epmismatch /* only if multiple tx fifos enabled */
140#if 0 /* only if periodic fifo used */
141 | USB_GINTMSK_isooutdrop
142 | USB_GINTMSK_eopframe
143 | USB_GINTMSK_incomplisoin
144 | USB_GINTMSK_incomplisoout
145#endif
146 ;
147} 138}
148 139
149static void usb_flush_tx_fifos(int nums) 140static void usb_flush_tx_fifos(int nums)
@@ -158,31 +149,28 @@ static void usb_flush_tx_fifos(int nums)
158 if(USB_GRSTCTL & USB_GRSTCTL_txfflsh_flush) 149 if(USB_GRSTCTL & USB_GRSTCTL_txfflsh_flush)
159 panicf("usb: hang of flush tx fifos (%x)", nums); 150 panicf("usb: hang of flush tx fifos (%x)", nums);
160 /* wait 3 phy clocks */ 151 /* wait 3 phy clocks */
161 sleep(1); 152 udelay(1);
162} 153}
163 154
164static void usb_flush_rx_fifo(void) 155static void usb_flush_rx_fifo(void)
165{ 156{
166 unsigned int i = 0; 157 unsigned int i = 0;
167 158
168 USB_GRSTCTL |= USB_GRSTCTL_rxfflsh_flush; 159 USB_GRSTCTL = USB_GRSTCTL_rxfflsh_flush;
169 while(USB_GRSTCTL & USB_GRSTCTL_rxfflsh_flush && i < 0x300) 160 while(USB_GRSTCTL & USB_GRSTCTL_rxfflsh_flush && i < 0x300)
170 i++; 161 i++;
171 if(USB_GRSTCTL & USB_GRSTCTL_rxfflsh_flush) 162 if(USB_GRSTCTL & USB_GRSTCTL_rxfflsh_flush)
172 panicf("usb: hang of flush rx fifo"); 163 panicf("usb: hang of flush rx fifo");
173 /* wait 3 phy clocks */ 164 /* wait 3 phy clocks */
174 sleep(1); 165 udelay(1);
175} 166}
176 167
177static void core_reset(void) 168static void core_reset(void)
178{ 169{
179 unsigned int i = 0; 170 unsigned int i = 0;
180 /* Wait for AHB master IDLE state. */ 171 /* Wait for AHB master IDLE state. */
181 while((USB_GRSTCTL & USB_GRSTCTL_ahbidle) == 0); 172 while((USB_GRSTCTL & USB_GRSTCTL_ahbidle) == 0)
182 { 173 udelay(10);
183 /*udelay(10);*/
184 sleep(1);
185 }
186 /* Core Soft Reset */ 174 /* Core Soft Reset */
187 USB_GRSTCTL |= USB_GRSTCTL_csftrst; 175 USB_GRSTCTL |= USB_GRSTCTL_csftrst;
188 /* Waits for the hardware to clear reset bit */ 176 /* Waits for the hardware to clear reset bit */
@@ -193,8 +181,7 @@ static void core_reset(void)
193 panicf("oops, usb core soft reset hang :("); 181 panicf("oops, usb core soft reset hang :(");
194 182
195 /* Wait for 3 PHY Clocks */ 183 /* Wait for 3 PHY Clocks */
196 /*mdelay(100);*/ 184 udelay(1);
197 sleep(1);
198} 185}
199 186
200static void core_dev_init(void) 187static void core_dev_init(void)
@@ -216,12 +203,6 @@ static void core_dev_init(void)
216 panicf("usb: wrong HS phy type (%ld)", USB_GHWCFG2_HS_PHY_TYPE); 203 panicf("usb: wrong HS phy type (%ld)", USB_GHWCFG2_HS_PHY_TYPE);
217 if(USB_GHWCFG2_FS_PHY_TYPE != USB_PHY_TYPE_UNSUPPORTED) 204 if(USB_GHWCFG2_FS_PHY_TYPE != USB_PHY_TYPE_UNSUPPORTED)
218 panicf("usb: wrong FS phy type (%ld)", USB_GHWCFG2_FS_PHY_TYPE); 205 panicf("usb: wrong FS phy type (%ld)", USB_GHWCFG2_FS_PHY_TYPE);
219 #ifdef USB_USE_CUSTOM_FIFO_LAYOUT
220 if(USB_GHWCFG2_DYN_FIFO != 1)
221 panicf("usb: no dynamic fifo");
222 if(USB_GRXFSIZ != USB_DATA_FIFO_DEPTH)
223 panicf("usb: wrong data fifo size");
224 #endif /* USB_USE_CUSTOM_FIFO_LAYOUT */
225 if(USB_GHWCFG4_UTMI_PHY_DATA_WIDTH != 0x2) 206 if(USB_GHWCFG4_UTMI_PHY_DATA_WIDTH != 0x2)
226 panicf("usb: wrong utmi data width (%ld)", USB_GHWCFG4_UTMI_PHY_DATA_WIDTH); 207 panicf("usb: wrong utmi data width (%ld)", USB_GHWCFG4_UTMI_PHY_DATA_WIDTH);
227 if(USB_GHWCFG4_DED_FIFO_EN != 1) /* it seems to be multiple tx fifo support */ 208 if(USB_GHWCFG4_DED_FIFO_EN != 1) /* it seems to be multiple tx fifo support */
@@ -264,52 +245,12 @@ static void core_dev_init(void)
264 USB_GET_FIFOSIZE_DEPTH(USB_DIEPTXFSIZ(i))); 245 USB_GET_FIFOSIZE_DEPTH(USB_DIEPTXFSIZ(i)));
265 } 246 }
266 247
267 #ifdef USB_USE_CUSTOM_FIFO_LAYOUT
268 /* Setup FIFOs */
269 /* Organize FIFO as follow:
270 * 0 -> rxfsize : RX fifo
271 * rxfsize -> rxfsize + nptxfsize : TX fifo for first IN ep
272 * rxfsize + nptxfsize -> rxfsize + 2 * nptxfsize : TX fifo for second IN ep
273 * rxfsize + 2 * nptxfsize -> rxfsize + 3 * nptxfsize : TX fifo for third IN ep
274 * ...
275 */
276
277 unsigned short adr = 0;
278 unsigned short depth = USB_RX_FIFO_SIZE;
279 USB_GRXFSIZ = depth;
280 adr += depth;
281 depth = USB_NPTX_FIFO_SIZE;
282 USB_GNPTXFSIZ = USB_MAKE_FIFOSIZE_DATA(adr, depth);
283 adr += depth;
284
285 for(i = 1; i <= USB_NUM_IN_EP; i++)
286 {
287 depth = USB_EPTX_FIFO_SIZE;
288 USB_DIEPTXFSIZ(i) = USB_MAKE_FIFOSIZE_DATA(adr, depth);
289 adr += depth;
290 }
291
292 logf("used:");
293 logf(" rx fifo: [%04x,+%4lx]", 0, USB_GRXFSIZ);
294 logf(" nptx fifo: [%04lx,+%4lx]", USB_GET_FIFOSIZE_START_ADR(USB_GNPTXFSIZ),
295 USB_GET_FIFOSIZE_DEPTH(USB_GNPTXFSIZ));
296 for(i = 1; i <= USB_NUM_IN_EP; i++)
297 {
298 logf(" dieptx fifo(%2u): [%04lx,+%4lx]", i,
299 USB_GET_FIFOSIZE_START_ADR(USB_DIEPTXFSIZ(i)),
300 USB_GET_FIFOSIZE_DEPTH(USB_DIEPTXFSIZ(i)));
301 }
302
303 if(adr > USB_DATA_FIFO_DEPTH)
304 panicf("usb: total data fifo size exceeded");
305 #endif /* USB_USE_CUSTOM_FIFO_LAYOUT */
306
307 /* flush the fifos */ 248 /* flush the fifos */
308 usb_flush_tx_fifos(0x10); /* flush all */ 249 usb_flush_tx_fifos(0x10); /* flush all */
309 usb_flush_rx_fifo(); 250 usb_flush_rx_fifo();
310 251
311 /* flush learning queue */ 252 /* flush learning queue */
312 USB_GRSTCTL |= USB_GRSTCTL_intknqflsh; 253 USB_GRSTCTL = USB_GRSTCTL_intknqflsh;
313 254
314 /* Clear all pending device interrupts */ 255 /* Clear all pending device interrupts */
315 USB_DIEPMSK = 0; 256 USB_DIEPMSK = 0;
@@ -361,33 +302,30 @@ static void core_dev_init(void)
361 302
362static void core_init(void) 303static void core_init(void)
363{ 304{
364 /* Reset the Controller */ 305 /* Setup phy for high speed */
306 USB_GUSBCFG &= ~USB_GUSBCFG_ulpi_ext_vbus_drv;
307 /* Disable external TS Dline pulsing (???) */
308 USB_GUSBCFG &= ~USB_GUSBCFG_term_sel_dl_pulse;
309 /* core reset */
365 core_reset(); 310 core_reset();
366 311
367 /* Setup phy for high speed */ 312 /* Select UTMI */
368 /* 1) select utmi */ 313 USB_GUSBCFG &= ~USB_GUSBCFG_ulpi_utmi_sel;
369 /* fixme: the clip+ hardware support utmi only, this is useless */ 314 /* Select UTMI+ 16 */
370 //USB_GUSBCFG &= ~USB_GUSBCFG_ulpi_utmi_sel;
371 /* 2) select utmi 16-bit wide bus */
372 USB_GUSBCFG |= USB_GUSBCFG_phy_if; 315 USB_GUSBCFG |= USB_GUSBCFG_phy_if;
373 /* 3) core reset */ 316 /* core reset */
374 /* fixme: linux patch says the phy parameters survive the soft reset so
375 * perhaps this part can be done only one type but I don't know
376 * what happened when phy goes to standby mode and clock are disabled */
377 core_reset(); 317 core_reset();
378 318
379 /* fixme: at this point, the linux patch sets ulpi bits to 0 on utmi selection 319 /* fixme: the linux code does that but the clip+ doesn't use ULPI it seems */
380 * but the clip+ hardware does not support it so don't bother with 320 USB_GUSBCFG &= ~(USB_GUSBCFG_ulpi_fsls | USB_GUSBCFG_ulpi_clk_sus_m);
381 * that */
382 321
383 /* fixme: the current code is for internal DMA only, the clip+ architecture 322 /* fixme: the current code is for internal DMA only, the clip+ architecture
384 * define the internal DMA model */ 323 * define the internal DMA model */
385 /* Set burstlen */ 324 /* Set burstlen and enable DMA*/
386 USB_GAHBCFG |= USB_GAHBCFG_INT_DMA_BURST_INCR << USB_GAHBCFG_hburstlen_bit_pos; 325 USB_GAHBCFG = (USB_GAHBCFG_INT_DMA_BURST_INCR << USB_GAHBCFG_hburstlen_bit_pos)
387 /* Enable DMA */ 326 | USB_GAHBCFG_dma_enable;
388 USB_GAHBCFG |= USB_GAHBCFG_dma_enable;
389 /* Disable HNP and SRP, not sure it's useful because we already forced dev mode */ 327 /* Disable HNP and SRP, not sure it's useful because we already forced dev mode */
390 USB_GUSBCFG &= ~(USB_GUSBCFG_SRP_cap | USB_GUSBCFG_HNP_cap); 328 USB_GUSBCFG &= ~(USB_GUSBCFG_srpcap | USB_GUSBCFG_hnpcapp);
391 329
392 /* enable basic interrupts */ 330 /* enable basic interrupts */
393 usb_enable_common_interrupts(); 331 usb_enable_common_interrupts();
@@ -472,13 +410,212 @@ int usb_drv_send_nonblocking(int ep, void *ptr, int len)
472 return -1; 410 return -1;
473} 411}
474 412
413static void activate_ep0(void)
414{
415 /* Setup EP0 OUT to receive setup packets and
416 * EP0 IN to transmit packets
417 * The setup takes enumeration speed into account
418 */
419
420 /* Setup packet size of IN ep based of enumerated speed */
421 switch((USB_DSTS & USB_DSTS_enumspd_bits) >> USB_DSTS_enumspd_bit_pos)
422 {
423 case USB_DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ:
424 case USB_DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ:
425 case USB_DSTS_ENUMSPD_FS_PHY_48MHZ:
426 /* Use 64 bytes packet size */
427 USB_DIEPCTL(0) = (USB_DIEPCTL(0) & (~USB_DEPCTL_mps_bits))
428 | (USB_DEPCTL_MPS_64 << USB_DEPCTL_mps_bit_pos);
429 break;
430 case USB_DSTS_ENUMSPD_LS_PHY_6MHZ:
431 USB_DIEPCTL(0) = (USB_DIEPCTL(0) & (~USB_DEPCTL_mps_bits))
432 | (USB_DEPCTL_MPS_8 << USB_DEPCTL_mps_bit_pos);
433 break;
434 default:
435 panicf("usb: invalid enum speed");
436 }
437
438 /* Enable OUT ep for receive */
439 USB_DOEPCTL(0) |= USB_DEPCTL_epena;
440
441 /* Clear non periodic NAK for IN ep */
442 USB_DCTL |= USB_DCTL_cgnpinnak;
443}
444
445static void ep0_out_start(void)
446{
447 /* Setup EP0 OUT with the following parameters:
448 * packet count = 1
449 * setup packet count = 1
450 * transfer size = 8 (=sizeof setup packet)
451 */
452
453 USB_DOEPTSIZ(0) = (1 << USB_DEPTSIZ0_supcnt_bit_pos)
454 | (1 << USB_DEPTSIZ0_pkcnt_bit_pos)
455 | 8;
456
457 /* setup DMA */
458 clean_dcache_range((void*)&ep0_setup_pkt, sizeof ep0_setup_pkt); /* force write back */
459 USB_DOEPDMA(0) = (unsigned long)&ep0_setup_pkt; /* virtual address=physical address */
460
461 /* enable EP */
462 USB_DOEPCTL(0) |= USB_DEPCTL_epena | USB_DEPCTL_usbactep;
463}
464
465static bool handle_usb_reset(void)
466{
467 unsigned int i;
468 logf("usb: bus reset");
469
470 /* Clear the Remote Wakeup Signalling */
471 USB_DCTL &= ~USB_DCTL_rmtwkupsig;
472
473 /* Set NAK for all OUT EPs */
474 for(i = 0; i <= USB_NUM_OUT_EP; i++)
475 USB_DOEPCTL(i) = USB_DEPCTL_snak;
476
477 /* Flush the NP Tx FIFO */
478 usb_flush_tx_fifos(0);
479
480 /* Flush the Learning Queue */
481 USB_GRSTCTL = USB_GRSTCTL_intknqflsh;
482
483 /* Setup interrupt masks */
484 USB_DAINTMSK = USB_DAINT_IN_EP(0) | USB_DAINT_OUT_EP(0);
485 USB_DOEPMSK = USB_DOEPINT_setup | USB_DOEPINT_xfercompl | USB_DOEPINT_ahberr
486 | USB_DOEPINT_epdisabled;
487 USB_DIEPMSK = USB_DIEPINT_xfercompl | USB_DIEPINT_timeout
488 | USB_DIEPINT_epdisabled | USB_DIEPINT_ahberr
489 | USB_DIEPINT_intknepmis;
490
491 /* Reset Device Address */
492 USB_DCFG &= ~USB_DCFG_devadr_bits;
493
494 /* setup EP0 to receive SETUP packets */
495 ep0_out_start();
496 /* Clear interrupt */
497 USB_GINTSTS = USB_GINTMSK_usbreset;
498
499 usb_disable_global_interrupts();
500
501 return true;
502}
503
504static bool handle_enum_done(void)
505{
506 logf("usb: enum done");
507
508 /* Enable EP0 to receive SETUP packets */
509 activate_ep0();
510
511 /* Set USB turnaround time
512 * fixme: unsure about this */
513 //USB_GUSBCFG = (USB_GUSBCFG & ~USB_GUSBCFG_usbtrdtim_bits) | (5 << USB_GUSBCFG_usbtrdtim_bit_pos);
514 //panicf("usb: turnaround time is %d", (USB_GUSBCFG & USB_GUSBCFG_usbtrdtim_bits) >> USB_GUSBCFG_usbtrdtim_bit_pos);
515
516 /* Clear interrupt */
517 USB_GINTSTS = USB_GINTMSK_enumdone;
518
519 return true;
520}
521
522static bool handle_in_ep_int(void)
523{
524 logf("usb: in ep int");
525 return false;
526}
527
528static bool handle_out_ep_int(void)
529{
530 logf("usb: out ep int");
531 return false;
532}
533
534static void dump_intsts(char *buffer, size_t size, unsigned long sts)
535{
536 (void) size;
537 buffer[0] = 0;
538 #define DUMP_CASE(name) \
539 if(sts & USB_GINTMSK_##name) strcat(buffer, #name " ");
540
541 DUMP_CASE(modemismatch)
542 DUMP_CASE(otgintr)
543 DUMP_CASE(sofintr)
544 DUMP_CASE(rxstsqlvl)
545 DUMP_CASE(nptxfempty)
546 DUMP_CASE(ginnakeff)
547 DUMP_CASE(goutnakeff)
548 DUMP_CASE(i2cintr)
549 DUMP_CASE(erlysuspend)
550 DUMP_CASE(usbsuspend)
551 DUMP_CASE(usbreset)
552 DUMP_CASE(enumdone)
553 DUMP_CASE(isooutdrop)
554 DUMP_CASE(eopframe)
555 DUMP_CASE(epmismatch)
556 DUMP_CASE(inepintr)
557 DUMP_CASE(outepintr)
558 DUMP_CASE(incomplisoin)
559 DUMP_CASE(incomplisoout)
560 DUMP_CASE(portintr)
561 DUMP_CASE(hcintr)
562 DUMP_CASE(ptxfempty)
563 DUMP_CASE(conidstschng)
564 DUMP_CASE(disconnect)
565 DUMP_CASE(sessreqintr)
566 DUMP_CASE(wkupintr)
567
568 buffer[strlen(buffer) - 1] = 0;
569}
570
475/* interrupt service routine */ 571/* interrupt service routine */
476void INT_USB(void) 572void INT_USB(void)
477{ 573{
478 panicf("USB interrupt !"); 574 static char buffer[256];
575 /* some bits in GINTSTS can be set even though we didn't enable the interrupt source
576 * so AND it with the actual mask */
577 unsigned long sts = USB_GINTSTS & USB_GINTMSK;
578 unsigned long handled_one = 0; /* mask of all listed one (either handled or not) */
579
580 #define HANDLED_CASE(bitmask, callfn) \
581 handled_one |= bitmask; \
582 if(sts & bitmask) \
583 { \
584 if(!callfn()) \
585 goto Lerr; \
586 }
587
588 #define UNHANDLED_CASE(bitmask) \
589 handled_one |= bitmask; \
590 if(sts & bitmask) \
591 goto Lunhandled;
592
593 /* device part */
594 HANDLED_CASE(USB_GINTMSK_usbreset, handle_usb_reset)
595 HANDLED_CASE(USB_GINTMSK_enumdone, handle_enum_done)
596 HANDLED_CASE(USB_GINTMSK_inepintr, handle_in_ep_int)
597 HANDLED_CASE(USB_GINTMSK_outepintr, handle_out_ep_int)
598
599 /* common part */
600 UNHANDLED_CASE(USB_GINTMSK_otgintr)
601 UNHANDLED_CASE(USB_GINTMSK_conidstschng)
602 UNHANDLED_CASE(USB_GINTMSK_disconnect)
603
604 /* unlisted ones */
605 if(sts & ~handled_one)
606 goto Lunhandled;
607
608 return;
609
610 Lunhandled:
611 dump_intsts(buffer, sizeof buffer, sts);
612 panicf("unhandled usb int: %lx (%s)", sts, buffer);
613
614 Lerr:
615 dump_intsts(buffer, sizeof buffer, sts);
616 panicf("error in usb int: %lx (%s)", sts, buffer);
479} 617}
480 618
481/* (not essential? , not implemented in usb-tcc.c) */
482void usb_drv_set_test_mode(int mode) 619void usb_drv_set_test_mode(int mode)
483{ 620{
484 (void) mode; 621 (void) mode;