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Diffstat (limited to 'firmware/target/arm/as3525/system-as3525.c')
-rw-r--r--firmware/target/arm/as3525/system-as3525.c82
1 files changed, 1 insertions, 81 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index 3ba56cf30a..940f183c63 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -30,9 +30,6 @@
30#include "clock-target.h" 30#include "clock-target.h"
31#include "fmradio_i2c.h" 31#include "fmradio_i2c.h"
32#include "button-target.h" 32#include "button-target.h"
33#ifndef BOOTLOADER
34#include "mmu-arm.h"
35#endif
36#include "backlight-target.h" 33#include "backlight-target.h"
37 34
38#define default_interrupt(name) \ 35#define default_interrupt(name) \
@@ -210,81 +207,6 @@ static inline void check_model_variant(void)
210} 207}
211#endif /* SANSA_C200V2*/ 208#endif /* SANSA_C200V2*/
212 209
213#if defined(BOOTLOADER)
214static void sdram_delay(void)
215{
216 int delay = 1024; /* arbitrary */
217 while (delay--) ;
218}
219
220/* Use the same initialization than OF */
221static void sdram_init(void)
222{
223 CGU_PERI |= (CGU_EXTMEM_CLOCK_ENABLE|CGU_EXTMEMIF_CLOCK_ENABLE);
224
225 MPMC_CONTROL = 0x1; /* enable MPMC */
226
227 MPMC_DYNAMIC_CONTROL = 0x183; /* SDRAM NOP, all clocks high */
228 sdram_delay();
229
230 MPMC_DYNAMIC_CONTROL = 0x103; /* SDRAM PALL, all clocks high */
231 sdram_delay();
232
233 MPMC_DYNAMIC_REFRESH = 0x138; /* 0x138 * 16 HCLK ticks between SDRAM refresh cycles */
234
235 MPMC_CONFIG = 0; /* little endian, HCLK:MPMCCLKOUT[3:0] ratio = 1:1 */
236
237 if(MPMC_PERIPH_ID2 & 0xf0)
238 MPMC_DYNAMIC_READ_CONFIG = 0x1; /* command delayed, clock out not delayed */
239
240 /* timings */
241 MPMC_DYNAMIC_tRP = 2;
242 MPMC_DYNAMIC_tRAS = 4;
243 MPMC_DYNAMIC_tSREX = 5;
244 MPMC_DYNAMIC_tAPR = 0;
245 MPMC_DYNAMIC_tDAL = 4;
246 MPMC_DYNAMIC_tWR = 2;
247 MPMC_DYNAMIC_tRC = 5;
248 MPMC_DYNAMIC_tRFC = 5;
249 MPMC_DYNAMIC_tXSR = 5;
250 MPMC_DYNAMIC_tRRD = 2;
251 MPMC_DYNAMIC_tMRD = 2;
252
253#if defined(SANSA_CLIP) || defined(SANSA_M200V4) || defined(SANSA_C200V2)
254/* 16 bits external bus, low power SDRAM, 16 Mbits = 2 Mbytes */
255#define MEMORY_MODEL 0x21
256
257#elif defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_CLIPV2) \
258 || defined(SANSA_CLIPPLUS) || defined(SANSA_FUZEV2)
259/* 16 bits external bus, high performance SDRAM, 64 Mbits = 8 Mbytes */
260#define MEMORY_MODEL 0x5
261
262#else
263#error "The external memory in your player is unknown"
264#endif
265
266 MPMC_DYNAMIC_RASCAS_0 = (2<<8)|2; /* CAS & RAS latency = 2 clock cycles */
267 MPMC_DYNAMIC_CONFIG_0 = (MEMORY_MODEL << 7);
268
269 MPMC_DYNAMIC_RASCAS_1 = MPMC_DYNAMIC_CONFIG_1 =
270 MPMC_DYNAMIC_RASCAS_2 = MPMC_DYNAMIC_CONFIG_2 =
271 MPMC_DYNAMIC_RASCAS_3 = MPMC_DYNAMIC_CONFIG_3 = 0;
272
273 MPMC_DYNAMIC_CONTROL = 0x82; /* SDRAM MODE, MPMCCLKOUT runs continuously */
274
275 /* program the SDRAM mode register */
276 /* FIXME: details the exact settings of mode register */
277 asm volatile(
278 "ldr r4, [%0]\n"
279 : : "p"(0x30000000+0x2300*MEM) : "r4");
280
281 /* SDRAM NORMAL, MPMCCLKOUT stopped when SDRAM is idle */
282 MPMC_DYNAMIC_CONTROL = 0x0;
283
284 MPMC_DYNAMIC_CONFIG_0 |= (1<<19); /* buffer enable */
285}
286#endif /* BOOTLOADER */
287
288void system_init(void) 210void system_init(void)
289{ 211{
290#if CONFIG_CPU == AS3525v2 212#if CONFIG_CPU == AS3525v2
@@ -343,9 +265,7 @@ void system_init(void)
343#endif 265#endif
344 AS3525_PCLK_SEL); 266 AS3525_PCLK_SEL);
345 267
346#if defined(BOOTLOADER) 268#if !defined(BOOTLOADER) && defined(SANSA_FUZE) || defined(SANSA_CLIP) || defined(SANSA_E200V2)
347 sdram_init();
348#elif defined(SANSA_FUZE) || defined(SANSA_CLIP) || defined(SANSA_E200V2)
349 /* XXX: remove me when we have a new bootloader */ 269 /* XXX: remove me when we have a new bootloader */
350 MPMC_DYNAMIC_CONTROL = 0x0; /* MPMCCLKOUT stops when all SDRAMs are idle */ 270 MPMC_DYNAMIC_CONTROL = 0x0; /* MPMCCLKOUT stops when all SDRAMs are idle */
351#endif /* BOOTLOADER */ 271#endif /* BOOTLOADER */