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Diffstat (limited to 'firmware/target/arm/as3525/system-as3525.c')
-rw-r--r--firmware/target/arm/as3525/system-as3525.c35
1 files changed, 16 insertions, 19 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index 51b6755601..4de111d00f 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -306,8 +306,6 @@ void system_init(void)
306 306
307 CGU_PERI |= CGU_ROM_ENABLE; /* needed for rebooting */ 307 CGU_PERI |= CGU_ROM_ENABLE; /* needed for rebooting */
308 308
309 set_cpu_frequency(CPUFREQ_DEFAULT);
310
311#if 0 /* the GPIO clock is already enabled by the dualboot function */ 309#if 0 /* the GPIO clock is already enabled by the dualboot function */
312 CGU_PERI |= CGU_GPIO_CLOCK_ENABLE; 310 CGU_PERI |= CGU_GPIO_CLOCK_ENABLE;
313#endif 311#endif
@@ -335,10 +333,8 @@ void system_init(void)
335 ascodec_write_pmu(0x18, 1, 0x35); 333 ascodec_write_pmu(0x18, 1, 0x35);
336 /* AVDD17: set AVDD17 power supply to 2.5V */ 334 /* AVDD17: set AVDD17 power supply to 2.5V */
337 ascodec_write_pmu(0x18, 7, 0x31); 335 ascodec_write_pmu(0x18, 7, 0x31);
338#ifdef SANSA_CLIPZIP 336 /* CVDD2: set CVDD2 power supply (digital for DAC/SD/etc) to 2.65V */
339 /* CVDD2: set CVDD2 power supply to 2.8V */ 337 ascodec_write_pmu(0x17, 2, 0x80 | 113);
340 ascodec_write_pmu(0x17, 2, 0xF4);
341#endif
342#else /* HAVE_AS3543 */ 338#else /* HAVE_AS3543 */
343 ascodec_write(AS3514_CVDD_DCDC3, AS314_CP_DCDC3_SETTING); 339 ascodec_write(AS3514_CVDD_DCDC3, AS314_CP_DCDC3_SETTING);
344#endif /* HAVE_AS3543 */ 340#endif /* HAVE_AS3543 */
@@ -460,23 +456,18 @@ void set_cpu_frequency(long frequency)
460 } 456 }
461} 457}
462#else /* as3525v2 */ 458#else /* as3525v2 */
463/* FIXME : disabled for now, seems to cause buggy memory accesses
464 * Disabling MMU or putting the function in uncached memory seems to help? */
465void set_cpu_frequency(long frequency) 459void set_cpu_frequency(long frequency)
466{ 460{
467 int oldstatus = disable_irq_save();
468
469 /* We only have 2 settings */
470 cpu_frequency = (frequency == CPUFREQ_MAX) ? frequency : CPUFREQ_NORMAL;
471
472 if(frequency == CPUFREQ_MAX) 461 if(frequency == CPUFREQ_MAX)
473 { 462 {
474 /* Change PCLK while FCLK is low, so it doesn't go too high */ 463 /* Set CVDD1 power supply */
475 CGU_PERI = (CGU_PERI & ~(0xF << 2)) | (AS3525_PCLK_DIV0 << 2); 464 /*ascodec_write_pmu(0x17, 1, 0x80 | 47);*/
476 465
477 CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | 466 CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) |
478 (AS3525_FCLK_PREDIV << 2) | 467 (AS3525_FCLK_PREDIV << 2) |
479 AS3525_FCLK_SEL); 468 AS3525_FCLK_SEL);
469
470 cpu_frequency = CPUFREQ_MAX;
480 } 471 }
481 else 472 else
482 { 473 {
@@ -484,11 +475,17 @@ void set_cpu_frequency(long frequency)
484 (AS3525_FCLK_PREDIV << 2) | 475 (AS3525_FCLK_PREDIV << 2) |
485 AS3525_FCLK_SEL); 476 AS3525_FCLK_SEL);
486 477
487 /* Change PCLK after FCLK is low, so it doesn't go too high */ 478 cpu_frequency = CPUFREQ_NORMAL;
488 CGU_PERI = (CGU_PERI & ~(0xF << 2)) | (AS3525_PCLK_DIV0_UNBOOSTED << 2);
489 }
490 479
491 restore_irq(oldstatus); 480 /* Set CVDD1 power supply */
481 /*
482#ifdef SANSA_CLIPZIP
483 ascodec_write_pmu(0x17, 1, 0x80 | 19);
484#else
485 ascodec_write_pmu(0x17, 1, 0x80 | 22);
486#endif
487 */
488 }
492} 489}
493#endif 490#endif
494 491