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Diffstat (limited to 'firmware/target/arm/as3525/system-as3525.c')
-rw-r--r--firmware/target/arm/as3525/system-as3525.c17
1 files changed, 6 insertions, 11 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index 4e1714b8aa..41cc54301b 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -254,11 +254,14 @@ void system_init(void)
254 CCU_SCON = 1; /* AHB master's priority configuration : 254 CCU_SCON = 1; /* AHB master's priority configuration :
255 TIC (Test Interface Controller) > DMA > USB > IDE > ARM */ 255 TIC (Test Interface Controller) > DMA > USB > IDE > ARM */
256 256
257#if CONFIG_CPU == AS3525
258 CGU_PROC = 0; /* fclk 24 MHz */
259#endif
260 CGU_PERI &= ~0x7f; /* pclk 24 MHz */ 257 CGU_PERI &= ~0x7f; /* pclk 24 MHz */
261 258
259 asm volatile(
260 "mrc p15, 0, r0, c1, c0 \n" /* control register */
261 "bic r0, r0, #3<<30 \n" /* clears bus bits : sets fastbus */
262 "mcr p15, 0, r0, c1, c0 \n"
263 : : : "r0" );
264
262 CGU_PLLASUP = 0; /* enable PLLA */ 265 CGU_PLLASUP = 0; /* enable PLLA */
263 CGU_PLLA = AS3525_PLLA_SETTING; 266 CGU_PLLA = AS3525_PLLA_SETTING;
264 while(!(CGU_INTCTRL & (1<<0))); /* wait until PLLA is locked */ 267 while(!(CGU_INTCTRL & (1<<0))); /* wait until PLLA is locked */
@@ -269,12 +272,10 @@ void system_init(void)
269 while(!(CGU_INTCTRL & (1<<1))); /* wait until PLLB is locked */ 272 while(!(CGU_INTCTRL & (1<<1))); /* wait until PLLB is locked */
270#endif 273#endif
271 274
272#if CONFIG_CPU == AS3525
273 /* Set FCLK frequency */ 275 /* Set FCLK frequency */
274 CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | 276 CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) |
275 (AS3525_FCLK_PREDIV << 2) | 277 (AS3525_FCLK_PREDIV << 2) |
276 AS3525_FCLK_SEL); 278 AS3525_FCLK_SEL);
277#endif
278 279
279 /* Set PCLK frequency */ 280 /* Set PCLK frequency */
280 CGU_PERI = ((CGU_PERI & ~0x7F) | /* reset divider & clksel bits */ 281 CGU_PERI = ((CGU_PERI & ~0x7F) | /* reset divider & clksel bits */
@@ -282,12 +283,6 @@ void system_init(void)
282 (AS3525_PCLK_DIV1 << 6) | 283 (AS3525_PCLK_DIV1 << 6) |
283 AS3525_PCLK_SEL); 284 AS3525_PCLK_SEL);
284 285
285 asm volatile(
286 "mrc p15, 0, r0, c1, c0 \n" /* control register */
287 "bic r0, r0, #3<<30 \n" /* clears bus bits : sets fastbus */
288 "mcr p15, 0, r0, c1, c0 \n"
289 : : : "r0" );
290
291#ifdef BOOTLOADER 286#ifdef BOOTLOADER
292 sdram_init(); 287 sdram_init();
293#endif /* BOOTLOADER */ 288#endif /* BOOTLOADER */