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Diffstat (limited to 'firmware/target/arm/as3525/system-as3525.c')
-rw-r--r--firmware/target/arm/as3525/system-as3525.c37
1 files changed, 34 insertions, 3 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index 8aa2d02ab7..0ea0c8fba4 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -33,6 +33,8 @@
33#include "backlight-target.h" 33#include "backlight-target.h"
34#include "lcd.h" 34#include "lcd.h"
35 35
36struct mutex cpufreq_mtx;
37
36/* Charge Pump and Power management Settings */ 38/* Charge Pump and Power management Settings */
37#define AS314_CP_DCDC3_SETTING \ 39#define AS314_CP_DCDC3_SETTING \
38 ((0<<7) | /* CP_SW Auto-Switch Margin 0=200/300 1=150/255 */ \ 40 ((0<<7) | /* CP_SW Auto-Switch Margin 0=200/300 1=150/255 */ \
@@ -144,6 +146,7 @@ static const struct { int source; void (*isr) (void); } vec_int_srcs[] =
144 { INT_SRC_USB, INT_USB_FUNC, }, 146 { INT_SRC_USB, INT_USB_FUNC, },
145 { INT_SRC_TIMER1, INT_TIMER1 }, 147 { INT_SRC_TIMER1, INT_TIMER1 },
146 { INT_SRC_TIMER2, INT_TIMER2 }, 148 { INT_SRC_TIMER2, INT_TIMER2 },
149 { INT_SRC_I2C_AUDIO, INT_I2C_AUDIO },
147 { INT_SRC_AUDIO, INT_AUDIO }, 150 { INT_SRC_AUDIO, INT_AUDIO },
148 /* Lowest priority at the end of the list */ 151 /* Lowest priority at the end of the list */
149}; 152};
@@ -322,6 +325,12 @@ void system_init(void)
322 setup_vic(); 325 setup_vic();
323 326
324 dma_init(); 327 dma_init();
328}
329
330/* this is called after kernel and threading are initialized */
331void kernel_device_init(void)
332{
333 mutex_init(&cpufreq_mtx);
325 334
326 ascodec_init(); 335 ascodec_init();
327 336
@@ -329,7 +338,8 @@ void system_init(void)
329#ifdef HAVE_AS3543 338#ifdef HAVE_AS3543
330 /* PLL: disable audio PLL, we use MCLK already */ 339 /* PLL: disable audio PLL, we use MCLK already */
331 ascodec_write_pmu(0x1A, 7, 0x02); 340 ascodec_write_pmu(0x1A, 7, 0x02);
332 /* DCDC_Cntr: set switching speed of CVDD1/2 power supplies to 1 MHz */ 341 /* DCDC_Cntr: set switching speed of CVDD1/2 power supplies to 1 MHz,
342 immediate change */
333 ascodec_write_pmu(0x17, 7, 0x30); 343 ascodec_write_pmu(0x17, 7, 0x30);
334 /* Out_Cntr2: set drive strength of 24 MHz and 32 kHz clocks to 1 mA */ 344 /* Out_Cntr2: set drive strength of 24 MHz and 32 kHz clocks to 1 mA */
335 ascodec_write_pmu(0x1A, 2, 0xCC); 345 ascodec_write_pmu(0x1A, 2, 0xCC);
@@ -414,11 +424,28 @@ void udelay(unsigned usecs)
414 424
415#ifndef BOOTLOADER 425#ifndef BOOTLOADER
416#ifdef HAVE_ADJUSTABLE_CPU_FREQ 426#ifdef HAVE_ADJUSTABLE_CPU_FREQ
427bool set_cpu_frequency__lock(void)
428{
429 if (get_processor_mode() != CPU_MODE_THREAD_CONTEXT)
430 return false;
431
432 mutex_lock(&cpufreq_mtx);
433 return true;
434}
435
436void set_cpu_frequency__unlock(void)
437{
438 mutex_unlock(&cpufreq_mtx);
439}
417 440
418#if CONFIG_CPU == AS3525 441#if CONFIG_CPU == AS3525
419void set_cpu_frequency(long frequency) 442void set_cpu_frequency(long frequency)
420{ 443{
421 if(frequency == CPUFREQ_MAX) 444 if (frequency == cpu_frequency)
445 {
446 /* avoid redundant activity */
447 }
448 else if(frequency == CPUFREQ_MAX)
422 { 449 {
423#ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE 450#ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE
424 /* Increasing frequency so boost voltage before change */ 451 /* Increasing frequency so boost voltage before change */
@@ -464,7 +491,11 @@ void set_cpu_frequency(long frequency)
464#else /* as3525v2 */ 491#else /* as3525v2 */
465void set_cpu_frequency(long frequency) 492void set_cpu_frequency(long frequency)
466{ 493{
467 if(frequency == CPUFREQ_MAX) 494 if (frequency == cpu_frequency)
495 {
496 /* avoid redundant activity */
497 }
498 else if(frequency == CPUFREQ_MAX)
468 { 499 {
469#ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE 500#ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE
470 /* Set CVDD1 power supply */ 501 /* Set CVDD1 power supply */