diff options
Diffstat (limited to 'firmware/target/arm/as3525/clock-target.h')
-rw-r--r-- | firmware/target/arm/as3525/clock-target.h | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h new file mode 100644 index 0000000000..fd8cb021fa --- /dev/null +++ b/firmware/target/arm/as3525/clock-target.h | |||
@@ -0,0 +1,64 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright © 2008 Rafaël Carré | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #ifndef CLOCK_TARGET_H | ||
22 | #define CLOCK_TARGET_H | ||
23 | |||
24 | /* PLL */ | ||
25 | |||
26 | #define AS3525_PLLA_FREQ 248000000 | ||
27 | #define AS3525_PLLA_SETTING 0x261F | ||
28 | |||
29 | /* CPU */ | ||
30 | |||
31 | /* ensure that PLLA_FREQ * prediv == CPUFREQ_MAX */ | ||
32 | #define AS3525_CPU_PREDIV 0 /* div = 1/1 */ | ||
33 | |||
34 | #define CPUFREQ_MAX 248000000 | ||
35 | |||
36 | #define CPUFREQ_DEFAULT 24800000 | ||
37 | |||
38 | #define CPUFREQ_NORMAL 31000000 | ||
39 | |||
40 | /* peripherals */ | ||
41 | |||
42 | #define AS3525_PCLK_FREQ 65000000 | ||
43 | |||
44 | #define AS3525_IDE_FREQ 90000000 | ||
45 | |||
46 | #define AS3525_SD_IDENT_FREQ 400000 /* must be between 100 & 400 kHz */ | ||
47 | |||
48 | #define AS3525_I2C_FREQ 400000 | ||
49 | |||
50 | /* LCD controller : varies on the models */ | ||
51 | #if defined(SANSA_CLIP) | ||
52 | #define AS3525_DBOP_FREQ 6000000 | ||
53 | #elif defined(SANSA_M200V4) | ||
54 | #define AS3525_DBOP_FREQ 8000000 | ||
55 | #elif defined(SANSA_FUZE) | ||
56 | #define AS3525_DBOP_FREQ 24000000 | ||
57 | #elif defined(SANSA_E200V2) | ||
58 | #define AS3525_DBOP_FREQ 8000000 | ||
59 | #endif | ||
60 | |||
61 | /* macro for not giving a target clock > at the one provided */ | ||
62 | #define CLK_DIV(ref, target) ((ref + target - 1) / target) | ||
63 | |||
64 | #endif /* CLOCK_TARGET_H */ | ||