summaryrefslogtreecommitdiff
path: root/firmware/system.c
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/system.c')
-rw-r--r--firmware/system.c62
1 files changed, 61 insertions, 1 deletions
diff --git a/firmware/system.c b/firmware/system.c
index eb6c6eedb4..3ead7c6be3 100644
--- a/firmware/system.c
+++ b/firmware/system.c
@@ -106,6 +106,57 @@ void set_pll_freq(int pll_index, long freq_out) {
106 } while ((*pllcon & 0x2) == 0); /* wait for stabilization */ 106 } while ((*pllcon & 0x2) == 0); /* wait for stabilization */
107} 107}
108 108
109int smsc_version(void) {
110 int v;
111 int* smsc_ver_addr = (int*)0x4C20;
112 __asm__ ("ldc %0, @%1" : "=r"(v) : "a"(smsc_ver_addr));
113 v &= 0xFF;
114 if (v < 4 || v == 0xFF) {
115 return 3;
116 }
117 return v;
118}
119
120
121
122void smsc_delay() {
123 int i;
124 /* FIXME: tune the delay.
125 !!! Delay should depend on CPU speed !!!
126 */
127 for (i = 0; i < 100; i++) {
128
129 }
130}
131
132static void extra_init(void) {
133 /* Power on
134 P1 |= 0x01;
135 P1CON |= 0x01;
136 */
137
138 /* SMSC chip config (?) */
139 P6CON |= 0x08;
140 P10CON |= 0x20;
141 P6 &= 0xF7;
142 P10 &= 0x20;
143 smsc_delay();
144 if (smsc_version() < 4) {
145 P6 |= 0x80;
146 P10 |= 0x20;
147 }
148
149 /* P5 conf
150 * line 2 & 4 are digital, other analog. : P5CON = 0xec;
151 */
152
153 /* P7 conf
154 nothing to do: all are inputs
155 (reset value of the register is good)
156 */
157
158}
159
109/* called by crt0 */ 160/* called by crt0 */
110void system_init(void) 161void system_init(void)
111{ 162{
@@ -119,7 +170,14 @@ void system_init(void)
119 /* keep alive (?) -- clear the bit to prevent crash at start (??) */ 170 /* keep alive (?) -- clear the bit to prevent crash at start (??) */
120 P8 = 0x00; 171 P8 = 0x00;
121 P8CON = 0x01; 172 P8CON = 0x01;
122 173
174 /* smsc chip init (?) */
175 P10 = 0x20;
176 P6 = 0x08;
177
178 P10CON = 0x20;
179 P6CON = 0x08;
180
123 /******** 181 /********
124 * CPU 182 * CPU
125 */ 183 */
@@ -170,6 +228,8 @@ void system_init(void)
170/* IRQ13 IIS0 INT */ 228/* IRQ13 IIS0 INT */
171/* IRQ14 IIS1 INT */ 229/* IRQ14 IIS1 INT */
172/* IRQ15 ­ */ 230/* IRQ15 ­ */
231
232 extra_init();
173} 233}
174 234
175#elif CONFIG_CPU == MCF5249 235#elif CONFIG_CPU == MCF5249