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Diffstat (limited to 'firmware/pcm_playback.c')
-rw-r--r--firmware/pcm_playback.c24
1 files changed, 13 insertions, 11 deletions
diff --git a/firmware/pcm_playback.c b/firmware/pcm_playback.c
index 0007a71f1f..22dc34d7c2 100644
--- a/firmware/pcm_playback.c
+++ b/firmware/pcm_playback.c
@@ -63,6 +63,12 @@ static void (*callback_for_more)(unsigned char**, size_t*) IDATA_ATTR = NULL;
63#define IIS_DEFPARM(freq) ((freq << 12) | 0x300 | 4 << 2) 63#define IIS_DEFPARM(freq) ((freq << 12) | 0x300 | 4 << 2)
64#define IIS_RESET 0x800 64#define IIS_RESET 0x800
65 65
66#ifdef IAUDIO_X5
67#define SET_IIS_CONFIG(x) IIS1CONFIG = (x);
68#else
69#define SET_IIS_CONFIG(x) IIS2CONFIG = (x);
70#endif
71
66static int pcm_freq = 0x6; /* 44.1 is default */ 72static int pcm_freq = 0x6; /* 44.1 is default */
67 73
68/* Set up the DMA transfer that kicks in when the audio FIFO gets empty */ 74/* Set up the DMA transfer that kicks in when the audio FIFO gets empty */
@@ -84,7 +90,7 @@ static void dma_start(const void *addr, size_t size)
84 BCR0 = size; /* Bytes to transfer */ 90 BCR0 = size; /* Bytes to transfer */
85 91
86 /* Enable the FIFO and force one write to it */ 92 /* Enable the FIFO and force one write to it */
87 IIS2CONFIG = IIS_DEFPARM(pcm_freq); 93 SET_IIS_CONFIG(IIS_DEFPARM(pcm_freq));
88 /* Also send the audio to S/PDIF */ 94 /* Also send the audio to S/PDIF */
89#ifdef HAVE_SPDIF_OUT 95#ifdef HAVE_SPDIF_OUT
90 EBU1CONFIG = EBU_DEFPARM; 96 EBU1CONFIG = EBU_DEFPARM;
@@ -100,7 +106,7 @@ static void dma_stop(void)
100 DCR0 = 0; 106 DCR0 = 0;
101 DSR0 = 1; 107 DSR0 = 1;
102 /* Reset the FIFO */ 108 /* Reset the FIFO */
103 IIS2CONFIG = IIS_RESET | IIS_DEFPARM(pcm_freq); 109 SET_IIS_CONFIG(IIS_RESET | IIS_DEFPARM(pcm_freq));
104#ifdef HAVE_SPDIF_OUT 110#ifdef HAVE_SPDIF_OUT
105 EBU1CONFIG = IIS_RESET | EBU_DEFPARM; 111 EBU1CONFIG = IIS_RESET | EBU_DEFPARM;
106#endif 112#endif
@@ -196,7 +202,7 @@ void pcm_init(void)
196 DMACONFIG = 1; /* DMA0Req = PDOR3 */ 202 DMACONFIG = 1; /* DMA0Req = PDOR3 */
197 203
198 /* Reset the audio FIFO */ 204 /* Reset the audio FIFO */
199 IIS2CONFIG = IIS_RESET; 205 SET_IIS_CONFIG(IIS_RESET);
200 206
201 /* Enable interrupt at level 7, priority 0 */ 207 /* Enable interrupt at level 7, priority 0 */
202 ICR6 = 0x1c; 208 ICR6 = 0x1c;
@@ -205,7 +211,7 @@ void pcm_init(void)
205 pcm_set_frequency(44100); 211 pcm_set_frequency(44100);
206 212
207 /* Prevent pops (resets DAC to zero point) */ 213 /* Prevent pops (resets DAC to zero point) */
208 IIS2CONFIG = IIS_DEFPARM(pcm_freq) | IIS_RESET; 214 SET_IIS_CONFIG(IIS_DEFPARM(pcm_freq) | IIS_RESET);
209 215
210#if defined(HAVE_UDA1380) 216#if defined(HAVE_UDA1380)
211 /* Initialize default register values. */ 217 /* Initialize default register values. */
@@ -223,7 +229,6 @@ void pcm_init(void)
223 229
224#elif defined(HAVE_TLV320) 230#elif defined(HAVE_TLV320)
225 tlv320_init(); 231 tlv320_init();
226 tlv320_enable_output(true);
227 sleep(HZ/4); 232 sleep(HZ/4);
228 tlv320_mute(false); 233 tlv320_mute(false);
229#endif 234#endif
@@ -547,7 +552,7 @@ void pcm_play_pause(bool play)
547 552
548#ifdef CPU_COLDFIRE 553#ifdef CPU_COLDFIRE
549 /* Enable the FIFO and force one write to it */ 554 /* Enable the FIFO and force one write to it */
550 IIS2CONFIG = IIS_DEFPARM(pcm_freq); 555 SET_IIS_CONFIG(IIS_DEFPARM(pcm_freq));
551#ifdef HAVE_SPDIF_OUT 556#ifdef HAVE_SPDIF_OUT
552 EBU1CONFIG = EBU_DEFPARM; 557 EBU1CONFIG = EBU_DEFPARM;
553#endif 558#endif
@@ -607,7 +612,7 @@ void pcm_play_pause(bool play)
607#ifdef CPU_COLDFIRE 612#ifdef CPU_COLDFIRE
608 /* Disable DMA peripheral request. */ 613 /* Disable DMA peripheral request. */
609 DCR0 &= ~DMA_EEXT; 614 DCR0 &= ~DMA_EEXT;
610 IIS2CONFIG = IIS_RESET | IIS_DEFPARM(pcm_freq); 615 SET_IIS_CONFIG(IIS_RESET | IIS_DEFPARM(pcm_freq));
611#ifdef HAVE_SPDIF_OUT 616#ifdef HAVE_SPDIF_OUT
612 EBU1CONFIG = IIS_RESET | EBU_DEFPARM; 617 EBU1CONFIG = IIS_RESET | EBU_DEFPARM;
613#endif 618#endif
@@ -664,15 +669,12 @@ void pcm_calculate_peaks(int *left, int *right)
664 short *addr; 669 short *addr;
665 short *end; 670 short *end;
666 { 671 {
667#ifdef HAVE_UDA1380 672#ifdef CPU_COLDFIRE
668 size_t samples = (BCR0 & 0xffffff) / 4; 673 size_t samples = (BCR0 & 0xffffff) / 4;
669 addr = (short *) (SAR0 & ~3); 674 addr = (short *) (SAR0 & ~3);
670#elif defined(HAVE_WM8975) || defined(HAVE_WM8758) || defined(HAVE_WM8731) 675#elif defined(HAVE_WM8975) || defined(HAVE_WM8758) || defined(HAVE_WM8731)
671 size_t samples = p_size / 4; 676 size_t samples = p_size / 4;
672 addr = p; 677 addr = p;
673#elif defined(HAVE_TLV320)
674 size_t samples = 4; /* TODO X5 */
675 addr = NULL;
676#endif 678#endif
677 679
678 if (samples > PEAK_SAMPLES) 680 if (samples > PEAK_SAMPLES)