diff options
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/system.h | 165 |
1 files changed, 8 insertions, 157 deletions
diff --git a/firmware/export/system.h b/firmware/export/system.h index b32d1d3a21..19ce7a4d6a 100644 --- a/firmware/export/system.h +++ b/firmware/export/system.h | |||
@@ -29,24 +29,6 @@ extern void system_init(void); | |||
29 | 29 | ||
30 | extern long cpu_frequency; | 30 | extern long cpu_frequency; |
31 | 31 | ||
32 | #ifdef CPU_PP | ||
33 | #define inl(a) (*(volatile unsigned long *) (a)) | ||
34 | #define outl(a,b) (*(volatile unsigned long *) (b) = (a)) | ||
35 | #define inb(a) (*(volatile unsigned char *) (a)) | ||
36 | #define outb(a,b) (*(volatile unsigned char *) (b) = (a)) | ||
37 | #define inw(a) (*(volatile unsigned short *) (a)) | ||
38 | #define outw(a,b) (*(volatile unsigned short *) (b) = (a)) | ||
39 | extern unsigned int ipod_hw_rev; | ||
40 | |||
41 | static inline void udelay(unsigned usecs) | ||
42 | { | ||
43 | unsigned stop = USEC_TIMER + usecs; | ||
44 | while (TIME_BEFORE(USEC_TIMER, stop)); | ||
45 | } | ||
46 | |||
47 | unsigned int current_core(void); | ||
48 | #endif | ||
49 | |||
50 | struct flash_header { | 32 | struct flash_header { |
51 | unsigned long magic; | 33 | unsigned long magic; |
52 | unsigned long length; | 34 | unsigned long length; |
@@ -173,10 +155,6 @@ int get_cpu_boost_counter(void); | |||
173 | #define H_TO_BE32(x) (x) | 155 | #define H_TO_BE32(x) (x) |
174 | #endif | 156 | #endif |
175 | 157 | ||
176 | |||
177 | #define nop \ | ||
178 | asm volatile ("nop") | ||
179 | |||
180 | /* gcc 3.4 changed the format of the constraints */ | 158 | /* gcc 3.4 changed the format of the constraints */ |
181 | #if (__GNUC__ >= 3) && (__GNUC_MINOR__ > 3) || (__GNUC__ >= 4) | 159 | #if (__GNUC__ >= 3) && (__GNUC_MINOR__ > 3) || (__GNUC__ >= 4) |
182 | #define I_CONSTRAINT "I08" | 160 | #define I_CONSTRAINT "I08" |
@@ -196,141 +174,7 @@ enum { | |||
196 | }; | 174 | }; |
197 | 175 | ||
198 | #ifndef SIMULATOR | 176 | #ifndef SIMULATOR |
199 | #if defined(CPU_COLDFIRE) || (CONFIG_CPU == S3C2440) || (CONFIG_CPU == SH7034) | ||
200 | #include "system-target.h" | 177 | #include "system-target.h" |
201 | #endif | ||
202 | #endif | ||
203 | |||
204 | #ifndef SIMULATOR | ||
205 | |||
206 | #if defined(CPU_ARM) | ||
207 | |||
208 | /* TODO: Implement set_irq_level and check CPU frequencies */ | ||
209 | |||
210 | #if CONFIG_CPU == S3C2440 | ||
211 | |||
212 | #define CPUFREQ_DEFAULT 98784000 | ||
213 | #define CPUFREQ_NORMAL 98784000 | ||
214 | #define CPUFREQ_MAX 296352000 | ||
215 | |||
216 | #elif CONFIG_CPU == PNX0101 | ||
217 | |||
218 | #define CPUFREQ_DEFAULT 12000000 | ||
219 | #define CPUFREQ_NORMAL 48000000 | ||
220 | #define CPUFREQ_MAX 60000000 | ||
221 | |||
222 | #else | ||
223 | |||
224 | #define CPUFREQ_DEFAULT_MULT 8 | ||
225 | #define CPUFREQ_DEFAULT 24000000 | ||
226 | #define CPUFREQ_NORMAL_MULT 10 | ||
227 | #define CPUFREQ_NORMAL 30000000 | ||
228 | #define CPUFREQ_MAX_MULT 25 | ||
229 | #define CPUFREQ_MAX 75000000 | ||
230 | |||
231 | #endif | ||
232 | |||
233 | static inline uint16_t swap16(uint16_t value) | ||
234 | /* | ||
235 | result[15..8] = value[ 7..0]; | ||
236 | result[ 7..0] = value[15..8]; | ||
237 | */ | ||
238 | { | ||
239 | return (value >> 8) | (value << 8); | ||
240 | } | ||
241 | |||
242 | static inline uint32_t swap32(uint32_t value) | ||
243 | /* | ||
244 | result[31..24] = value[ 7.. 0]; | ||
245 | result[23..16] = value[15.. 8]; | ||
246 | result[15.. 8] = value[23..16]; | ||
247 | result[ 7.. 0] = value[31..24]; | ||
248 | */ | ||
249 | { | ||
250 | uint32_t tmp; | ||
251 | |||
252 | asm volatile ( | ||
253 | "eor %1, %0, %0, ror #16 \n\t" | ||
254 | "bic %1, %1, #0xff0000 \n\t" | ||
255 | "mov %0, %0, ror #8 \n\t" | ||
256 | "eor %0, %0, %1, lsr #8 \n\t" | ||
257 | : "+r" (value), "=r" (tmp) | ||
258 | ); | ||
259 | return value; | ||
260 | } | ||
261 | |||
262 | static inline uint32_t swap_odd_even32(uint32_t value) | ||
263 | { | ||
264 | /* | ||
265 | result[31..24],[15.. 8] = value[23..16],[ 7.. 0] | ||
266 | result[23..16],[ 7.. 0] = value[31..24],[15.. 8] | ||
267 | */ | ||
268 | uint32_t tmp; | ||
269 | |||
270 | asm volatile ( /* ABCD */ | ||
271 | "bic %1, %0, #0x00ff00 \n\t" /* AB.D */ | ||
272 | "bic %0, %0, #0xff0000 \n\t" /* A.CD */ | ||
273 | "mov %0, %0, lsr #8 \n\t" /* .A.C */ | ||
274 | "orr %0, %0, %1, lsl #8 \n\t" /* B.D.|.A.C */ | ||
275 | : "+r" (value), "=r" (tmp) /* BADC */ | ||
276 | ); | ||
277 | return value; | ||
278 | } | ||
279 | |||
280 | #define HIGHEST_IRQ_LEVEL (1) | ||
281 | |||
282 | static inline int set_irq_level(int level) | ||
283 | { | ||
284 | unsigned long cpsr; | ||
285 | /* Read the old level and set the new one */ | ||
286 | asm volatile ("mrs %0,cpsr" : "=r" (cpsr)); | ||
287 | asm volatile ("msr cpsr_c,%0" | ||
288 | : : "r" ((cpsr & ~0x80) | (level << 7))); | ||
289 | return (cpsr >> 7) & 1; | ||
290 | } | ||
291 | |||
292 | static inline void set_fiq_handler(void(*fiq_handler)(void)) | ||
293 | { | ||
294 | /* Install the FIQ handler */ | ||
295 | *((unsigned int*)(15*4)) = (unsigned int)fiq_handler; | ||
296 | } | ||
297 | |||
298 | static inline void enable_fiq(void) | ||
299 | { | ||
300 | /* Clear FIQ disable bit */ | ||
301 | asm volatile ( | ||
302 | "mrs r0, cpsr \n"\ | ||
303 | "bic r0, r0, #0x40 \n"\ | ||
304 | "msr cpsr_c, r0 " | ||
305 | : : : "r0" | ||
306 | ); | ||
307 | } | ||
308 | |||
309 | static inline void disable_fiq(void) | ||
310 | { | ||
311 | /* Set FIQ disable bit */ | ||
312 | asm volatile ( | ||
313 | "mrs r0, cpsr \n"\ | ||
314 | "orr r0, r0, #0x40 \n"\ | ||
315 | "msr cpsr_c, r0 " | ||
316 | : : : "r0" | ||
317 | ); | ||
318 | } | ||
319 | |||
320 | #if CONFIG_CPU != S3C2440 | ||
321 | #define invalidate_icache() | ||
322 | #endif | ||
323 | |||
324 | #if CONFIG_CPU == PNX0101 | ||
325 | typedef void (*interrupt_handler_t)(void); | ||
326 | |||
327 | void irq_set_int_handler(int n, interrupt_handler_t handler); | ||
328 | void irq_enable_int(int n); | ||
329 | void irq_disable_int(int n); | ||
330 | #endif | ||
331 | |||
332 | #endif | ||
333 | |||
334 | #else /* SIMULATOR */ | 178 | #else /* SIMULATOR */ |
335 | 179 | ||
336 | static inline uint16_t swap16(uint16_t value) | 180 | static inline uint16_t swap16(uint16_t value) |
@@ -365,8 +209,15 @@ static inline uint32_t swap_odd_even32(uint32_t value) | |||
365 | return (t >> 8) | ((t ^ value) << 8); | 209 | return (t >> 8) | ((t ^ value) << 8); |
366 | } | 210 | } |
367 | 211 | ||
212 | #endif /* !SIMULATOR */ | ||
213 | |||
214 | /* Just define these as empty if not declared */ | ||
215 | #ifndef HAVE_INVALIDATE_ICACHE | ||
368 | #define invalidate_icache() | 216 | #define invalidate_icache() |
217 | #endif | ||
369 | 218 | ||
370 | #endif /* !SIMULATOR */ | 219 | #ifndef HAVE_FLUSH_ICACHE |
220 | #define flush_icache() | ||
221 | #endif | ||
371 | 222 | ||
372 | #endif /* __SYSTEM_H__ */ | 223 | #endif /* __SYSTEM_H__ */ |