diff options
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/mc13783.h | 170 |
1 files changed, 167 insertions, 3 deletions
diff --git a/firmware/export/mc13783.h b/firmware/export/mc13783.h index a489f4c8b9..bde1dc419d 100644 --- a/firmware/export/mc13783.h +++ b/firmware/export/mc13783.h | |||
@@ -89,19 +89,183 @@ enum mc13783_regs_enum | |||
89 | }; | 89 | }; |
90 | 90 | ||
91 | /* INTERRUPT_STATUS0, INTERRUPT_MASK0, INTERRUPT_SENSE0 */ | 91 | /* INTERRUPT_STATUS0, INTERRUPT_MASK0, INTERRUPT_SENSE0 */ |
92 | #define MC13783_ADCDONE (1 << 0) /* x */ | ||
93 | #define MC13783_ADCBISDONE (1 << 1) /* x */ | ||
94 | #define MC13783_TS (1 << 2) /* x */ | ||
95 | #define MC13783_WHIGH (1 << 3) /* x */ | ||
96 | #define MC13783_WLOW (1 << 4) /* x */ | ||
92 | #define MC13783_CHGDET (1 << 6) | 97 | #define MC13783_CHGDET (1 << 6) |
98 | #define MC13783_CHGOV (1 << 7) | ||
99 | #define MC13783_CHGREV (1 << 8) | ||
100 | #define MC13783_CHGSHORT (1 << 9) | ||
101 | #define MC13783_CCCV (1 << 10) | ||
102 | #define MC13783_CHGCURR (1 << 11) | ||
103 | #define MC13783_BPONI (1 << 12) | ||
104 | #define MC13783_LOBATL (1 << 13) | ||
105 | #define MC13783_LOBATH (1 << 14) | ||
106 | #define MC13783_UDP (1 << 15) | ||
107 | #define MC13783_USB (1 << 16) | ||
108 | #define MC13783_ID (1 << 19) | ||
109 | #define MC13783_SE1 (1 << 21) | ||
110 | #define MC13783_CKDET (1 << 22) | ||
111 | #define MC13783_UDM (1 << 23) | ||
112 | /* x = no sense bit */ | ||
93 | 113 | ||
94 | /* INTERRUPT_STATUS1, INTERRUPT_MASK1, INTERRUPT_SENSE1 */ | 114 | /* INTERRUPT_STATUS1, INTERRUPT_MASK1, INTERRUPT_SENSE1 */ |
95 | #define MC13783_HSL (1 << 0) | 115 | #define MC13783_1HZ (1 << 0) /* x */ |
96 | #define MC13783_ON1B (1 << 3) | 116 | #define MC13783_TODA (1 << 1) /* x */ |
97 | #define MC13783_ON2B (1 << 4) | 117 | #define MC13783_ONOFD1 (1 << 3) /* ON1B */ |
118 | #define MC13783_ONOFD2 (1 << 4) /* ON2B */ | ||
119 | #define MC13783_ONOFD3 (1 << 5) /* ON3B */ | ||
120 | #define MC13783_SYSRST (1 << 6) /* x */ | ||
121 | #define MC13783_RTCRST (1 << 7) /* x */ | ||
122 | #define MC13783_PCI (1 << 8) /* x */ | ||
123 | #define MC13783_WARM (1 << 9) /* x */ | ||
124 | #define MC13783_MEMHLD (1 << 10) /* x */ | ||
125 | #define MC13783_PWRRDY (1 << 11) | ||
126 | #define MC13783_THWARNL (1 << 12) | ||
127 | #define MC13783_THWARNH (1 << 13) | ||
128 | #define MC13783_CLK (1 << 14) | ||
129 | #define MC13783_SEMAF (1 << 15) /* x */ | ||
130 | #define MC13783_MC2B (1 << 17) | ||
131 | #define MC13783_HSDET (1 << 18) | ||
132 | #define MC13783_HSL (1 << 19) | ||
133 | #define MC13783_ALSPTH (1 << 20) | ||
134 | #define MC13783_AHSSHORT (1 << 21) | ||
135 | /* x = no sense bit */ | ||
136 | |||
137 | /* POWER_UP_MODE_SENSE */ | ||
138 | |||
139 | #define MC13783_ICTESTS (1 << 0) | ||
140 | #define MC13783_CLKSELS (1 << 1) | ||
141 | #define MC13783_PUMS1Sr(r) (((r) >> 2) & 0x3) | ||
142 | #define MC13783_PUMS2S (((r) >> 4) & 0x3) | ||
143 | #define MC13783_PUMS3S (((r) >> 6) & 0x3) | ||
144 | #define PUMS_LOW 0x0 | ||
145 | #define PUMS_OPEN 0x1 | ||
146 | #define PUMS_HIGH 0x2 | ||
147 | #define MC13783_CHRGMOD0Sr(r) (((r) >> 8) & 0x3) | ||
148 | #define MC13783_CHRGMOD1Sr(r) (((r) >> 10) & 0x3) | ||
149 | #define CHRGMOD_LOW 0x0 | ||
150 | #define CHRGMOD_OPEN 0x1 | ||
151 | #define CHRGMOD_HIGH 0x3 | ||
152 | #define MC13783_UMODSr(r) (((r) >> 12) & 0x3) | ||
153 | #define UMODS0_LOW_UMODS1_LOW 0x0 | ||
154 | #define UMODS0_OPEN_UMODS1_LOW 0x1 | ||
155 | #define UMODS0_DONTCARE_UMODS1_HIGH 0x2 | ||
156 | #define UMODS0_HIGH_UMODS1_LOW 0x3 | ||
157 | #define MC13783_USBEN (1 << 14) | ||
158 | #define MC13783_SW1ABS (1 << 15) | ||
159 | #define MC13783_SW2ABS (1 << 16) | ||
160 | |||
161 | /* IDENTIFICATION */ | ||
162 | /* SEMAPHORE */ | ||
163 | /* ARBITRATION_PERIPHERAL_AUDIO */ | ||
164 | /* ARBITRATION_SWITCHERS */ | ||
165 | /* ARBITRATION_REGULATORS0 */ | ||
166 | /* ARBITRATION_REGULATORS1 */ | ||
98 | 167 | ||
99 | /* POWER_CONTROL0 */ | 168 | /* POWER_CONTROL0 */ |
100 | #define MC13783_USEROFFSPI (1 << 3) | 169 | #define MC13783_USEROFFSPI (1 << 3) |
101 | 170 | ||
171 | /* POWER_CONTROL1 */ | ||
172 | /* POWER_CONTROL2 */ | ||
173 | /* REGEN_ASSIGNMENT */ | ||
174 | /* MEMORYA */ | ||
175 | /* MEMORYB */ | ||
176 | /* RTC_TIME */ | ||
177 | /* RTC_ALARM */ | ||
178 | /* RTC_DAY */ | ||
179 | /* RTC_DAY_ALARM */ | ||
180 | /* SWITCHERS0 */ | ||
181 | /* SWITCHERS1 */ | ||
182 | /* SWITCHERS2 */ | ||
183 | /* SWITCHERS3 */ | ||
184 | /* SWITCHERS4 */ | ||
185 | /* SWITCHERS5 */ | ||
186 | /* REGULATOR_SETTING0 */ | ||
187 | /* REGULATOR_SETTING1 */ | ||
188 | /* REGULATOR_MODE0 */ | ||
189 | /* REGULATOR_MODE1 */ | ||
190 | /* POWER_MISCELLANEOUS */ | ||
191 | /* AUDIO_RX0 */ | ||
192 | /* AUDIO_RX1 */ | ||
193 | /* AUDIO_TX */ | ||
194 | /* SSI_NETWORK */ | ||
195 | /* AUDIO_CODEC */ | ||
196 | /* AUDIO_STEREO_CODEC */ | ||
197 | |||
198 | /* ADC0 */ | ||
199 | #define MC13783_LICELLCON (1 << 0) | ||
200 | #define MC13783_CHRGICON (1 << 1) | ||
201 | #define MC13783_BATICON (1 << 2) | ||
202 | #define MC13783_RTHEN (1 << 3) | ||
203 | #define MC13783_DTHEN (1 << 4) | ||
204 | #define MC13783_UIDEN (1 << 5) | ||
205 | #define MC13783_ADOUTEN (1 << 6) | ||
206 | #define MC13783_ADOUTPER (1 << 7) | ||
207 | #define MC13783_ADREFEN (1 << 10) | ||
208 | #define MC13783_ADREFMODE (1 << 11) | ||
209 | #define MC13783_TSMODw(w) ((w) << 12) | ||
210 | #define MC13783_TSMODr(r) (((r) >> 12) & 0x3) | ||
211 | #define MC13783_CHRGRAWDIV (1 << 15) | ||
212 | #define MC13783_ADINC1 (1 << 16) | ||
213 | #define MC13783_ADINC2 (1 << 17) | ||
214 | #define MC13783_WCOMP (1 << 18) | ||
215 | #define MC13783_ADCBIS0 (1 << 23) | ||
216 | |||
217 | /* ADC1 */ | ||
218 | #define MC13783_ADEN (1 << 0) | ||
219 | #define MC13783_RAND (1 << 1) | ||
220 | #define MC13783_ADSEL (1 << 3) | ||
221 | #define MC13783_TRIGMASK (1 << 4) | ||
222 | #define MC13783_ADA1w(w) ((w) << 5) | ||
223 | #define MC13783_ADA1r(r) (((r) >> 5) & 0x3) | ||
224 | #define MC13783_ADA2w(w) ((w) << 8) | ||
225 | #define MC13783_ADA2r(r) (((r) >> 8) & 0x3) | ||
226 | #define MC13783_ATOw(w) ((w) << 11) | ||
227 | #define MC13783_ATOr(r) (((r) >> 11) & 0xff) | ||
228 | #define MC13783_ATOX (1 << 19) | ||
229 | #define MC13783_ASC (1 << 20) | ||
230 | #define MC13783_ADTRIGIGN (1 << 21) | ||
231 | #define MC13783_ADONESHOT (1 << 22) | ||
232 | #define MC13783_ADCBIS1 (1 << 23) | ||
233 | |||
234 | /* ADC2 */ | ||
235 | #define MC13783_ADD1r(r) (((r) >> 2) & 0x3ff) | ||
236 | #define MC13783_ADD2r(r) (((r) >> 14) & 0x3ff) | ||
237 | |||
238 | /* ADC3 */ | ||
239 | #define MC13783_WHIGHw(w) ((w) << 0) | ||
240 | #define MC13783_WHIGHr(r) ((r) & 0x3f) | ||
241 | #define MC13783_ICIDr(r) (((r) >> 6) & 0x3) | ||
242 | #define MC13783_WLOWw(w) ((w) << 9) | ||
243 | #define MC13783_WLOWr(r) (((r) >> 9) & 0x3f) | ||
244 | #define MC13783_ADCBIS2 (1 << 23) | ||
245 | |||
246 | /* ADC4 */ | ||
247 | #define MC13783_ADCBIS1r(r) (((r) >> 2) & 0x3ff) | ||
248 | #define MC13783_ADCBIS2r(r) (((r) >> 14) & 0x3ff) | ||
249 | |||
250 | /* CHARGER */ | ||
251 | /* USB0 */ | ||
252 | /* CHARGER_USB1 */ | ||
253 | |||
102 | /* LED_CONTROL0 */ | 254 | /* LED_CONTROL0 */ |
103 | #define MC13783_LEDEN (1 << 0) | 255 | #define MC13783_LEDEN (1 << 0) |
104 | 256 | ||
257 | /* LED_CONTROL1 */ | ||
258 | /* LED_CONTROL2 */ | ||
259 | /* LED_CONTROL3 */ | ||
260 | /* LED_CONTROL4 */ | ||
261 | /* LED_CONTROL5 */ | ||
262 | /* TRIM0 */ | ||
263 | /* TRIM1 */ | ||
264 | /* TEST0 */ | ||
265 | /* TEST1 */ | ||
266 | /* TEST2 */ | ||
267 | /* TEST3 */ | ||
268 | |||
105 | void mc13783_init(void); | 269 | void mc13783_init(void); |
106 | uint32_t mc13783_set(unsigned address, uint32_t bits); | 270 | uint32_t mc13783_set(unsigned address, uint32_t bits); |
107 | uint32_t mc13783_clear(unsigned address, uint32_t bits); | 271 | uint32_t mc13783_clear(unsigned address, uint32_t bits); |