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-rw-r--r--firmware/export/config/ipod6g.h7
-rw-r--r--firmware/export/s5l8702.h17
2 files changed, 20 insertions, 4 deletions
diff --git a/firmware/export/config/ipod6g.h b/firmware/export/config/ipod6g.h
index cb8100bb55..01934a0cc2 100644
--- a/firmware/export/config/ipod6g.h
+++ b/firmware/export/config/ipod6g.h
@@ -238,12 +238,15 @@
238#define DEFAULT_BRIGHTNESS_SETTING 0x20 238#define DEFAULT_BRIGHTNESS_SETTING 0x20
239 239
240/* USB defines */ 240/* USB defines */
241#define CONFIG_USBOTG USBOTG_DESIGNWARE
242#define USB_DW_CLOCK 0
243#define USB_DW_TURNAROUND 5
244/* logf() over USB serial (http://www.rockbox.org/wiki/PortalPlayerUsb) */
245//#define USB_ENABLE_SERIAL
241#define HAVE_USBSTACK 246#define HAVE_USBSTACK
242#define HAVE_USB_HID_MOUSE 247#define HAVE_USB_HID_MOUSE
243#define CONFIG_USBOTG USBOTG_S3C6400X
244#define USB_VENDOR_ID 0x05AC 248#define USB_VENDOR_ID 0x05AC
245#define USB_PRODUCT_ID 0x1261 249#define USB_PRODUCT_ID 0x1261
246#define USB_NUM_ENDPOINTS 6
247#define USB_DEVBSS_ATTR __attribute__((aligned(32))) 250#define USB_DEVBSS_ATTR __attribute__((aligned(32)))
248 251
249#define USB_READ_BUFFER_SIZE (1024*24) 252#define USB_READ_BUFFER_SIZE (1024*24)
diff --git a/firmware/export/s5l8702.h b/firmware/export/s5l8702.h
index 6500f69d37..4799b05d4f 100644
--- a/firmware/export/s5l8702.h
+++ b/firmware/export/s5l8702.h
@@ -175,8 +175,21 @@
175/////USB///// 175/////USB/////
176#define OTGBASE 0x38400000 176#define OTGBASE 0x38400000
177#define PHYBASE 0x3C400000 177#define PHYBASE 0x3C400000
178#define SYNOPSYSOTG_CLOCK 0 178
179#define SYNOPSYSOTG_AHBCFG (GAHBCFG_dma_enable | (GAHBCFG_INT_DMA_BURST_INCR8 << GAHBCFG_hburstlen_bitp) | GAHBCFG_glblintrmsk) 179/* OTG PHY control registers */
180#define OPHYPWR (*((uint32_t volatile*)(PHYBASE + 0x000)))
181#define OPHYCLK (*((uint32_t volatile*)(PHYBASE + 0x004)))
182#define ORSTCON (*((uint32_t volatile*)(PHYBASE + 0x008)))
183#define OPHYUNK3 (*((uint32_t volatile*)(PHYBASE + 0x018)))
184#define OPHYUNK1 (*((uint32_t volatile*)(PHYBASE + 0x01c)))
185#define OPHYUNK2 (*((uint32_t volatile*)(PHYBASE + 0x044)))
186
187/* 9 available EPs (0b00000001111101010000000111101011), 6 used */
188#define USB_NUM_ENDPOINTS 6
189
190/* Define this if the DWC implemented on this SoC does not support
191 DMA or you want to disable it. */
192// #define USB_DW_ARCH_SLAVE
180 193
181 194
182/////I2C///// 195/////I2C/////