diff options
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/config.h | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/firmware/export/config.h b/firmware/export/config.h index cd98fc9dca..a93152b5e7 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h | |||
@@ -457,25 +457,30 @@ | |||
457 | and not a special semaphore instruction */ | 457 | and not a special semaphore instruction */ |
458 | #define CORELOCK_SWAP 2 /* A swap (exchange) instruction */ | 458 | #define CORELOCK_SWAP 2 /* A swap (exchange) instruction */ |
459 | 459 | ||
460 | /* Dual core support - not yet working on the 1G/2G and 3G iPod */ | ||
461 | #if defined(CPU_PP) | 460 | #if defined(CPU_PP) |
462 | #define IDLE_STACK_SIZE 0x80 | 461 | #define IDLE_STACK_SIZE 0x80 |
463 | #define IDLE_STACK_WORDS 0x20 | 462 | #define IDLE_STACK_WORDS 0x20 |
464 | 463 | ||
464 | /* Attributes to place data in uncached DRAM */ | ||
465 | /* These are useful beyond dual-core and ultimately beyond PP since they may | ||
466 | * be used for DMA buffers and such without cache maintenence calls. */ | ||
467 | #define NOCACHEBSS_ATTR __attribute__((section(".ncbss"),nocommon)) | ||
468 | #define NOCACHEDATA_ATTR __attribute__((section(".ncdata"),nocommon)) | ||
469 | |||
465 | #if !defined(FORCE_SINGLE_CORE) | 470 | #if !defined(FORCE_SINGLE_CORE) |
466 | 471 | ||
467 | #define NUM_CORES 2 | 472 | #define NUM_CORES 2 |
468 | #define CURRENT_CORE current_core() | 473 | #define CURRENT_CORE current_core() |
469 | /* Use IRAM for variables shared across cores - large memory buffers should | 474 | /* Attributes for core-shared data in DRAM where IRAM is better used for other |
470 | * use UNCACHED_ADDR(a) and be appropriately aligned and padded */ | 475 | * purposes. */ |
471 | #define NOCACHEBSS_ATTR IBSS_ATTR | 476 | #define SHAREDBSS_ATTR NOCACHEBSS_ATTR |
472 | #define NOCACHEDATA_ATTR IDATA_ATTR | 477 | #define SHAREDDATA_ATTR NOCACHEDATA_ATTR |
473 | 478 | ||
474 | #define IF_COP(...) __VA_ARGS__ | 479 | #define IF_COP(...) __VA_ARGS__ |
475 | #define IF_COP_VOID(...) __VA_ARGS__ | 480 | #define IF_COP_VOID(...) __VA_ARGS__ |
476 | #define IF_COP_CORE(core) core | 481 | #define IF_COP_CORE(core) core |
477 | 482 | ||
478 | #if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002 | 483 | #ifdef CPU_PP |
479 | #define CONFIG_CORELOCK SW_CORELOCK /* SWP(B) is broken */ | 484 | #define CONFIG_CORELOCK SW_CORELOCK /* SWP(B) is broken */ |
480 | #else | 485 | #else |
481 | #define CONFIG_CORELOCK CORELOCK_SWAP | 486 | #define CONFIG_CORELOCK CORELOCK_SWAP |
@@ -500,9 +505,10 @@ | |||
500 | #ifndef NUM_CORES | 505 | #ifndef NUM_CORES |
501 | /* Default to single core */ | 506 | /* Default to single core */ |
502 | #define NUM_CORES 1 | 507 | #define NUM_CORES 1 |
503 | #define CURRENT_CORE CPU | 508 | #define CURRENT_CORE CPU |
504 | #define NOCACHEBSS_ATTR | 509 | /* Attributes for core-shared data in DRAM - no caching considerations */ |
505 | #define NOCACHEDATA_ATTR | 510 | #define SHAREDBSS_ATTR |
511 | #define SHAREDDATA_ATTR | ||
506 | #define CONFIG_CORELOCK CORELOCK_NONE | 512 | #define CONFIG_CORELOCK CORELOCK_NONE |
507 | 513 | ||
508 | #define IF_COP(...) | 514 | #define IF_COP(...) |