diff options
Diffstat (limited to 'firmware/export/s5l8702.h')
-rw-r--r-- | firmware/export/s5l8702.h | 32 |
1 files changed, 30 insertions, 2 deletions
diff --git a/firmware/export/s5l8702.h b/firmware/export/s5l8702.h index 8e1d827f54..a83fe371e0 100644 --- a/firmware/export/s5l8702.h +++ b/firmware/export/s5l8702.h | |||
@@ -28,8 +28,6 @@ | |||
28 | #define REG16_PTR_T volatile uint16_t * | 28 | #define REG16_PTR_T volatile uint16_t * |
29 | #define REG32_PTR_T volatile uint32_t * | 29 | #define REG32_PTR_T volatile uint32_t * |
30 | 30 | ||
31 | #define TIMER_FREQ 54000000 | ||
32 | |||
33 | #define CACHEALIGN_BITS (5) /* 2^5 = 32 bytes */ | 31 | #define CACHEALIGN_BITS (5) /* 2^5 = 32 bytes */ |
34 | 32 | ||
35 | #define DRAM_ORIG 0x08000000 | 33 | #define DRAM_ORIG 0x08000000 |
@@ -65,6 +63,34 @@ | |||
65 | 63 | ||
66 | 64 | ||
67 | /////TIMER///// | 65 | /////TIMER///// |
66 | /* 16/32-bit timers: | ||
67 | * | ||
68 | * - Timers A..D: 16-bit counter, very similar to 16-bit timers described | ||
69 | * in S5L8700 DS, it seems that the timers C and D are disabled or not | ||
70 | * implemented. | ||
71 | * | ||
72 | * - Timers E..H: 32-bit counter, they are like 16-bit timers, but the | ||
73 | * interrupt status for all 32-bit timers is located in TSTAT register. | ||
74 | * | ||
75 | * - Clock source configuration: | ||
76 | * | ||
77 | * TCON[10:8] (Tx_CS) TCON[6]=0 TCON[6]=1 | ||
78 | * ------------------ --------- --------- | ||
79 | * 000 PCLK / 2 ECLK / 2 | ||
80 | * 001 PCLK / 4 ECLK / 4 | ||
81 | * 010 PCLK / 16 ECLK / 16 | ||
82 | * 011 PCLK / 64 ECLK / 64 | ||
83 | * 10x (timers E..H) PCLK ECLK | ||
84 | * 10x (timers A..D) Ext. Clock 0 Ext. Clock 0 | ||
85 | * 11x Ext. Clock 1 Ext. Clock 1 | ||
86 | * | ||
87 | * On Classic: | ||
88 | * - Ext. Clock 0: not connected or disabled | ||
89 | * - Ext. Clock 1: 32768 Hz, external OSC1?, PMU? | ||
90 | * - ECLK: 12 MHz, external OSC0? | ||
91 | */ | ||
92 | #define TIMER_FREQ 12000000 /* ECLK */ | ||
93 | |||
68 | #define TACON (*((uint32_t volatile*)(0x3C700000))) | 94 | #define TACON (*((uint32_t volatile*)(0x3C700000))) |
69 | #define TACMD (*((uint32_t volatile*)(0x3C700004))) | 95 | #define TACMD (*((uint32_t volatile*)(0x3C700004))) |
70 | #define TADATA0 (*((uint32_t volatile*)(0x3C700008))) | 96 | #define TADATA0 (*((uint32_t volatile*)(0x3C700008))) |
@@ -113,6 +139,7 @@ | |||
113 | #define THDATA1 (*((uint32_t volatile*)(0x3C70010C))) | 139 | #define THDATA1 (*((uint32_t volatile*)(0x3C70010C))) |
114 | #define THPRE (*((uint32_t volatile*)(0x3C700110))) | 140 | #define THPRE (*((uint32_t volatile*)(0x3C700110))) |
115 | #define THCNT (*((uint32_t volatile*)(0x3C700114))) | 141 | #define THCNT (*((uint32_t volatile*)(0x3C700114))) |
142 | #define TSTAT (*((uint32_t volatile*)(0x3C700118))) | ||
116 | #define USEC_TIMER TECNT | 143 | #define USEC_TIMER TECNT |
117 | 144 | ||
118 | 145 | ||
@@ -816,6 +843,7 @@ struct dma_lli | |||
816 | 843 | ||
817 | 844 | ||
818 | /////INTERRUPTS///// | 845 | /////INTERRUPTS///// |
846 | #define IRQ_TIMER32 7 | ||
819 | #define IRQ_TIMER 8 | 847 | #define IRQ_TIMER 8 |
820 | #define IRQ_USB_FUNC 19 | 848 | #define IRQ_USB_FUNC 19 |
821 | #define IRQ_DMAC(d) 16 + d | 849 | #define IRQ_DMAC(d) 16 + d |