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Diffstat (limited to 'firmware/export/pp5002.h')
-rw-r--r--firmware/export/pp5002.h22
1 files changed, 9 insertions, 13 deletions
diff --git a/firmware/export/pp5002.h b/firmware/export/pp5002.h
index 807c2e2708..b8f2d519dd 100644
--- a/firmware/export/pp5002.h
+++ b/firmware/export/pp5002.h
@@ -57,7 +57,6 @@
57#define DEV_RS (*(volatile unsigned long *)( 0xcf005030)) 57#define DEV_RS (*(volatile unsigned long *)( 0xcf005030))
58#define DEV_EN (*(volatile unsigned long *)( 0xcf005000)) 58#define DEV_EN (*(volatile unsigned long *)( 0xcf005000))
59 59
60
61#define CPU_INT_STAT (*(volatile unsigned long*)(0xcf001000)) 60#define CPU_INT_STAT (*(volatile unsigned long*)(0xcf001000))
62#define CPU_INT_EN (*(volatile unsigned long*)(0xcf001024)) 61#define CPU_INT_EN (*(volatile unsigned long*)(0xcf001024))
63#define CPU_INT_CLR (*(volatile unsigned long*)(0xcf001028)) 62#define CPU_INT_CLR (*(volatile unsigned long*)(0xcf001028))
@@ -70,11 +69,13 @@
70#define IISFIFO_CFG (*(volatile unsigned long*)(0xc000251c)) 69#define IISFIFO_CFG (*(volatile unsigned long*)(0xc000251c))
71#define IISFIFO_WR (*(volatile unsigned long*)(0xc0002540)) 70#define IISFIFO_WR (*(volatile unsigned long*)(0xc0002540))
72#define IISFIFO_RD (*(volatile unsigned long*)(0xc0002580)) 71#define IISFIFO_RD (*(volatile unsigned long*)(0xc0002580))
73/* PP5002 registers */ 72
74#define PP5002_TIMER1 0xcf001100 73#define TIMER1_CFG (*(volatile unsigned long *)(0xcf001100))
75#define PP5002_TIMER1_ACK 0xcf001104 74#define TIMER1_VAL (*(volatile unsigned long *)(0xcf001104))
76#define PP5002_TIMER2 0xcf001108 75#define TIMER2_CFG (*(volatile unsigned long *)(0xcf001108))
77#define PP5002_TIMER2_ACK 0xcf00110c 76#define TIMER2_VAL (*(volatile unsigned long *)(0xcf00110c))
77
78#define USEC_TIMER (*(volatile unsigned long *)(0xcf001110))
78 79
79#define PP5002_TIMER_STATUS 0xcf001110 80#define PP5002_TIMER_STATUS 0xcf001110
80 81
@@ -83,13 +84,13 @@
83#define I2S_IRQ 5 84#define I2S_IRQ 5
84#define SER1_IRQ 7 85#define SER1_IRQ 7
85#define TIMER1_IRQ 11 86#define TIMER1_IRQ 11
87#define TIMER2_IRQ 12 /* NOTE: THIS IS A GUESS, NEEDS TESTING */
86#define GPIO_IRQ 14 88#define GPIO_IRQ 14
87#define DMA_OUT_IRQ 30 89#define DMA_OUT_IRQ 30
88#define DMA_IN_IRQ 31 90#define DMA_IN_IRQ 31
89 91
90
91
92#define TIMER1_MASK (1 << TIMER1_IRQ) 92#define TIMER1_MASK (1 << TIMER1_IRQ)
93#define TIMER2_MASK (1 << TIMER2_IRQ)
93#define I2S_MASK (1 << I2S_IRQ) 94#define I2S_MASK (1 << I2S_IRQ)
94#define IDE_MASK (1 << IDE_IRQ) 95#define IDE_MASK (1 << IDE_IRQ)
95#define GPIO_MASK (1 << GPIO_IRQ) 96#define GPIO_MASK (1 << GPIO_IRQ)
@@ -97,9 +98,4 @@
97#define SER1_MASK (1 << SER1_IRQ) 98#define SER1_MASK (1 << SER1_IRQ)
98#define DMA_OUT_MASK (1 << DMA_OUT_IRQ) 99#define DMA_OUT_MASK (1 << DMA_OUT_IRQ)
99 100
100
101#define TIMER1_VAL (*(volatile unsigned long *)(0xcf001104))
102#define TIMER1_CFG (*(volatile unsigned long *)(0xcf001100))
103#define USEC_TIMER (*(volatile unsigned long *)(0xcf001110))
104
105#endif 101#endif