diff options
Diffstat (limited to 'firmware/export/pnx0101.h')
-rw-r--r-- | firmware/export/pnx0101.h | 143 |
1 files changed, 143 insertions, 0 deletions
diff --git a/firmware/export/pnx0101.h b/firmware/export/pnx0101.h index 4867c6b25d..8ff42de57a 100644 --- a/firmware/export/pnx0101.h +++ b/firmware/export/pnx0101.h | |||
@@ -78,4 +78,147 @@ | |||
78 | 78 | ||
79 | #define CODECVOL (*(volatile unsigned long *)0x80200398) | 79 | #define CODECVOL (*(volatile unsigned long *)0x80200398) |
80 | 80 | ||
81 | #ifndef ASM | ||
82 | |||
83 | /* Clock generation unit */ | ||
84 | |||
85 | struct pnx0101_cgu { | ||
86 | unsigned long base_scr[12]; | ||
87 | unsigned long base_fs1[12]; | ||
88 | unsigned long base_fs2[12]; | ||
89 | unsigned long base_ssr[12]; | ||
90 | unsigned long clk_pcr[73]; | ||
91 | unsigned long clk_psr[73]; | ||
92 | unsigned long clk_esr[67]; | ||
93 | unsigned long base_bcr[3]; | ||
94 | unsigned long base_fdc[18]; | ||
95 | }; | ||
96 | |||
97 | #define CGU (*(volatile struct pnx0101_cgu *)0x80004000) | ||
98 | |||
99 | #define PNX0101_SEL_STAGE_SYS 0 | ||
100 | #define PNX0101_SEL_STAGE_APB0 1 | ||
101 | #define PNX0101_SEL_STAGE_APB1 2 | ||
102 | #define PNX0101_SEL_STAGE_APB3 3 | ||
103 | #define PNX0101_SEL_STAGE_DAIO 9 | ||
104 | |||
105 | #define PNX0101_HIPREC_FDC 16 | ||
106 | |||
107 | #define PNX0101_FIRST_DIV_SYS 0 | ||
108 | #define PNX0101_N_DIV_SYS 7 | ||
109 | #define PNX0101_FIRST_DIV_APB0 7 | ||
110 | #define PNX0101_N_DIV_APB0 2 | ||
111 | #define PNX0101_FIRST_DIV_APB1 9 | ||
112 | #define PNX0101_N_DIV_APB1 1 | ||
113 | #define PNX0101_FIRST_DIV_APB3 10 | ||
114 | #define PNX0101_N_DIV_APB3 1 | ||
115 | #define PNX0101_FIRST_DIV_DAIO 12 | ||
116 | #define PNX0101_N_DIV_DAIO 6 | ||
117 | |||
118 | #define PNX0101_BCR_SYS 0 | ||
119 | #define PNX0101_BCR_APB0 1 | ||
120 | #define PNX0101_BCR_DAIO 2 | ||
121 | |||
122 | #define PNX0101_FIRST_ESR_SYS 0 | ||
123 | #define PNX0101_N_ESR_SYS 28 | ||
124 | #define PNX0101_FIRST_ESR_APB0 28 | ||
125 | #define PNX0101_N_ESR_APB0 9 | ||
126 | #define PNX0101_FIRST_ESR_APB1 37 | ||
127 | #define PNX0101_N_ESR_APB1 4 | ||
128 | #define PNX0101_FIRST_ESR_APB3 41 | ||
129 | #define PNX0101_N_ESR_APB3 16 | ||
130 | #define PNX0101_FIRST_ESR_DAIO 58 | ||
131 | #define PNX0101_N_ESR_DAIO 9 | ||
132 | |||
133 | #define PNX0101_ESR_APB1 0x25 | ||
134 | #define PNX0101_ESR_T0 0x26 | ||
135 | #define PNX0101_ESR_T1 0x27 | ||
136 | #define PNX0101_ESR_I2C 0x28 | ||
137 | |||
138 | #define PNX0101_CLOCK_APB1 0x25 | ||
139 | #define PNX0101_CLOCK_T0 0x26 | ||
140 | #define PNX0101_CLOCK_T1 0x27 | ||
141 | #define PNX0101_CLOCK_I2C 0x28 | ||
142 | |||
143 | #define PNX0101_MAIN_CLOCK_FAST 1 | ||
144 | #define PNX0101_MAIN_CLOCK_MAIN_PLL 9 | ||
145 | |||
146 | struct pnx0101_pll { | ||
147 | unsigned long hpfin; | ||
148 | unsigned long hpmdec; | ||
149 | unsigned long hpndec; | ||
150 | unsigned long hppdec; | ||
151 | unsigned long hpmode; | ||
152 | unsigned long hpstat; | ||
153 | unsigned long hpack; | ||
154 | unsigned long hpreq; | ||
155 | unsigned long hppad1; | ||
156 | unsigned long hppad2; | ||
157 | unsigned long hppad3; | ||
158 | unsigned long hpselr; | ||
159 | unsigned long hpseli; | ||
160 | unsigned long hpselp; | ||
161 | unsigned long lpfin; | ||
162 | unsigned long lppdn; | ||
163 | unsigned long lpmbyp; | ||
164 | unsigned long lplock; | ||
165 | unsigned long lpdbyp; | ||
166 | unsigned long lpmsel; | ||
167 | unsigned long lppsel; | ||
168 | }; | ||
169 | |||
170 | #define PLL (*(volatile struct pnx0101_pll *)0x80004cac) | ||
171 | |||
172 | struct pnx0101_emc { | ||
173 | unsigned long control; | ||
174 | unsigned long status; | ||
175 | }; | ||
176 | |||
177 | #define EMC (*(volatile struct pnx0101_emc *)0x80008000) | ||
178 | |||
179 | struct pnx0101_emcstatic { | ||
180 | unsigned long config; | ||
181 | unsigned long waitwen; | ||
182 | unsigned long waitoen; | ||
183 | unsigned long waitrd; | ||
184 | unsigned long waitpage; | ||
185 | unsigned long waitwr; | ||
186 | unsigned long waitturn; | ||
187 | }; | ||
188 | |||
189 | #define EMCSTATIC0 (*(volatile struct pnx0101_emcstatic *)0x80008200) | ||
190 | #define EMCSTATIC1 (*(volatile struct pnx0101_emcstatic *)0x80008220) | ||
191 | #define EMCSTATIC2 (*(volatile struct pnx0101_emcstatic *)0x80008240) | ||
192 | |||
193 | /* Timers */ | ||
194 | |||
195 | struct pnx0101_timer { | ||
196 | unsigned long load; | ||
197 | unsigned long value; | ||
198 | unsigned long ctrl; | ||
199 | unsigned long clr; | ||
200 | }; | ||
201 | |||
202 | #define TIMER0 (*(volatile struct pnx0101_timer *)0x80020000) | ||
203 | #define TIMER1 (*(volatile struct pnx0101_timer *)0x80020400) | ||
204 | |||
205 | /* Interrupt controller */ | ||
206 | |||
207 | #define IRQ_TIMER0 5 | ||
208 | #define IRQ_TIMER1 6 | ||
209 | #define IRQ_DMA 28 | ||
210 | |||
211 | #define INTPRIOMASK ((volatile unsigned long *)0x80300000) | ||
212 | #define INTVECTOR ((volatile unsigned long *)0x80300100) | ||
213 | #define INTPENDING (*(volatile unsigned long *)0x80300200) | ||
214 | #define INTFEATURES (*(volatile unsigned long *)0x80300300) | ||
215 | #define INTREQ ((volatile unsigned long *)0x80300400) | ||
216 | |||
217 | #define INTREQ_WEPRIO 0x10000000 | ||
218 | #define INTREQ_WETARGET 0x08000000 | ||
219 | #define INTREQ_WEENABLE 0x04000000 | ||
220 | #define INTREQ_WEACTVLO 0x02000000 | ||
221 | |||
222 | #endif /* ASM */ | ||
223 | |||
81 | #endif | 224 | #endif |