diff options
Diffstat (limited to 'firmware/export/mc13783.h')
| -rw-r--r-- | firmware/export/mc13783.h | 228 |
1 files changed, 82 insertions, 146 deletions
diff --git a/firmware/export/mc13783.h b/firmware/export/mc13783.h index d8b719be03..09fb1f1fc4 100644 --- a/firmware/export/mc13783.h +++ b/firmware/export/mc13783.h | |||
| @@ -246,29 +246,25 @@ enum mc13783_regs_enum | |||
| 246 | 246 | ||
| 247 | /* IDENTIFICATION (7) */ | 247 | /* IDENTIFICATION (7) */ |
| 248 | #define MC13783_REVISION (0x1f << 0) | 248 | #define MC13783_REVISION (0x1f << 0) |
| 249 | #define MC13783_REVISIONr(x) (((x) & MC13783_REVISION) >> 0) | 249 | #define MC13783_REVISION_POS (0) |
| 250 | #define MC13783_ICID (0x7 << 6) | 250 | #define MC13783_ICID (0x7 << 6) |
| 251 | #define MC13783_ICIDr(x) (((x) & MC13783_ICID) >> 6) | 251 | #define MC13783_ICID_POS (6) |
| 252 | #define MC13783_FIN (0x3 << 9) | 252 | #define MC13783_FIN (0x3 << 9) |
| 253 | #define MC13783_FINr(x) (((x) & MC13783_FIN) >> 9)) | 253 | #define MC13783_FIN_POS (9) |
| 254 | #define MC13783_FAB (0x3 << 12) | 254 | #define MC13783_FAB (0x3 << 12) |
| 255 | #define MC13783_FABr(x) (((x) & MC13783_FAB) >> 12)) | 255 | #define MC13783_FAB_POS (12) |
| 256 | 256 | ||
| 257 | /* SEMAPHORE (8) */ | 257 | /* SEMAPHORE (8) */ |
| 258 | #define MC13783_SEMCTRLA (0x1 << 0) | 258 | #define MC13783_SEMCTRLA (0x1 << 0) |
| 259 | #define MC13783_SEMCTRLB (0x1 << 2) | 259 | #define MC13783_SEMCTRLB (0x1 << 2) |
| 260 | #define MC13783_SEMWRTA (0xf << 4) | 260 | #define MC13783_SEMWRTA (0xf << 4) |
| 261 | #define MC13783_SEMWRTAw(x) (((x) << 4) & MC13783_SEMWRTA) | 261 | #define MC13783_SEMWRTA_POS (4) |
| 262 | #define MC13783_SEMWRTAr(x) (((x) & MC13783_SEMWRTA) >> 4) | ||
| 263 | #define MC13783_SEMWRTB (0x3f << 8) | 262 | #define MC13783_SEMWRTB (0x3f << 8) |
| 264 | #define MC13783_SEMWRTBw(x) (((x) << 8) & MC13783_SEMWRTB) | 263 | #define MC13783_SEMWRTB_POS (8) |
| 265 | #define MC13783_SEMWRTBr(x) (((x) & MC13783_SEMWRTB) >> 8) | ||
| 266 | #define MC13783_SEMRDA (0xf << 14) | 264 | #define MC13783_SEMRDA (0xf << 14) |
| 267 | #define MC13783_SEMRDAw(x) (((x) << 14) & MC13783_SEMRDA) | 265 | #define MC13783_SEMRDA_POS (14) |
| 268 | #define MC13783_SEMRDAr(x) (((x) & MC13783_SEMRDA) >> 14) | ||
| 269 | #define MC13783_SEMRDB (0x3f << 18) | 266 | #define MC13783_SEMRDB (0x3f << 18) |
| 270 | #define MC13783_SEMRDBw(x) (((x) << 18) & MC13783_SEMRDB) | 267 | #define MC13783_SEMRDB_POS (18) |
| 271 | #define MC13783_SEMRDBr(x) (((x) & MC13783_SEMRDB) >> 18) | ||
| 272 | 268 | ||
| 273 | /* ARBITRATION_PERIPHERAL_AUDIO (9) */ | 269 | /* ARBITRATION_PERIPHERAL_AUDIO (9) */ |
| 274 | #define MC13783_AUDIOTXSEL (0x3 << 0) | 270 | #define MC13783_AUDIOTXSEL (0x3 << 0) |
| @@ -418,20 +414,16 @@ enum mc13783_regs_enum | |||
| 418 | #define MC13783_COINCHEN (0x1 << 23) | 414 | #define MC13783_COINCHEN (0x1 << 23) |
| 419 | 415 | ||
| 420 | /* POWER_CONTROL1 (14) */ | 416 | /* POWER_CONTROL1 (14) */ |
| 421 | #define MC13783_PCT (0xff << 0) | ||
| 422 | /* Up to 8 seconds */ | 417 | /* Up to 8 seconds */ |
| 423 | #define MC13783_PCTw(x) (((x) << 0) & MC13783_PCT) | 418 | #define MC13783_PCT (0xff << 0) |
| 424 | #define MC13783_PCTr(x) (((x) & MC13783_PCT) >> 0) | 419 | #define MC13783_PCT_POS (0) |
| 425 | #define MC13783_PCCOUNT (0xf << 8) | 420 | #define MC13783_PCCOUNT (0xf << 8) |
| 426 | #define MC13783_PCCOUNTw(x) (((x) << 8) & MC13783_PCCOUNT) | 421 | #define MC13783_PCCOUNT_POS (8) |
| 427 | #define MC13783_PCCOUNTr(x) (((x) & MC13783_PCCOUNT) >> 8) | ||
| 428 | #define MC13783_PCMAXCNT (0xf << 12) | 422 | #define MC13783_PCMAXCNT (0xf << 12) |
| 429 | #define MC13783_PCMAXCNTw(x) (((x) << 12) & MC13783_PCMAXCNT) | 423 | #define MC13783_PCMAXCNT_POS (12) |
| 430 | #define MC13783_PCMAXCNTr(x) (((x) & MC13783_PCMAXCNT) >> 12) | ||
| 431 | #define MC13783_MEMTMR (0xf << 16) | ||
| 432 | /* Up to 8 minutes with MEMALLON=0, <> 0 + MEMALLON=1: infinite */ | 424 | /* Up to 8 minutes with MEMALLON=0, <> 0 + MEMALLON=1: infinite */ |
| 433 | #define MC13783_MEMTMRw(x) (((x) << 16) & MC13783_MEMTMR) | 425 | #define MC13783_MEMTMR (0xf << 16) |
| 434 | #define MC13783_MEMTMRr(x) (((x) & MC13783_MEMTMR) >> 16) | 426 | #define MC13783_MEMTMR_POS (16) |
| 435 | #define MC13783_MEMALLON (0x1 << 20) | 427 | #define MC13783_MEMALLON (0x1 << 20) |
| 436 | 428 | ||
| 437 | /* POWER_CONTROL2 (15) */ | 429 | /* POWER_CONTROL2 (15) */ |
| @@ -501,47 +493,35 @@ enum mc13783_regs_enum | |||
| 501 | 493 | ||
| 502 | /* SWITCHERS0 (24) */ | 494 | /* SWITCHERS0 (24) */ |
| 503 | #define MC13783_SW1A (0x3f << 0) | 495 | #define MC13783_SW1A (0x3f << 0) |
| 504 | #define MC13783_SW1Aw(x) (((x) << 0) & MC13783_SW1A) | 496 | #define MC13783_SW1A_POS (0) |
| 505 | #define MC13783_SW1Ar(x) (((x) & MC13783_SW1A) >> 0) | ||
| 506 | #define MC13783_SW1ADVS (0x3f << 6) | 497 | #define MC13783_SW1ADVS (0x3f << 6) |
| 507 | #define MC13783_SW1ADVSw(x) (((x) << 6) & MC13783_SW1ADVS) | 498 | #define MC13783_SW1ADVS_POS (6) |
| 508 | #define MC13783_SW1ADVSr(x) (((x) & MC13783_SW1ADVS) >> 6) | ||
| 509 | #define MC13783_SW1ASTBY (0x3f << 12) | 499 | #define MC13783_SW1ASTBY (0x3f << 12) |
| 510 | #define MC13783_SW1ASTBYw(x) (((x) << 12) & MC13783_SW1ASTBY) | 500 | #define MC13783_SW1ASTBY_POS (12) |
| 511 | #define MC13783_SW1ASTBYr(x) (((x) & MC13783_SW1ASTBY) >> 12) | ||
| 512 | 501 | ||
| 513 | /* SWITCHERS1 (25) */ | 502 | /* SWITCHERS1 (25) */ |
| 514 | #define MC13783_SW1B (0x3f << 0) | 503 | #define MC13783_SW1B (0x3f << 0) |
| 515 | #define MC13783_SW1Bw(x) (((x) << 0) & MC13783_SW1B) | 504 | #define MC13783_SW1B_POS (0) |
| 516 | #define MC13783_SW1Br(x) (((x) & MC13783_SW1B) >> 0) | ||
| 517 | #define MC13783_SW1BDVS (0x3f << 6) | 505 | #define MC13783_SW1BDVS (0x3f << 6) |
| 518 | #define MC13783_SW1BDVSw(x) (((x) << 6) & MC13783_SW1BDVS) | 506 | #define MC13783_SW1BDVS_POS (6) |
| 519 | #define MC13783_SW1BDVSr(x) (((x) & MC13783_SW1BDVS) >> 6) | ||
| 520 | #define MC13783_SW1BSTBY (0x3f << 12) | 507 | #define MC13783_SW1BSTBY (0x3f << 12) |
| 521 | #define MC13783_SW1BSTBYw(x) (((x) << 12) & MC13783_SW1BSTBY) | 508 | #define MC13783_SW1BSTBY_POS (12) |
| 522 | #define MC13783_SW1BSTBYr(x) (((x) & MC13783_SW1BSTBY) >> 12) | ||
| 523 | 509 | ||
| 524 | /* SWITCHERS2 (26) */ | 510 | /* SWITCHERS2 (26) */ |
| 525 | #define MC13783_SW2A (0x3f << 0) | 511 | #define MC13783_SW2A (0x3f << 0) |
| 526 | #define MC13783_SW2Aw(x) (((x) << 0) & MC13783_SW1A) | 512 | #define MC13783_SW2A_POS (0) |
| 527 | #define MC13783_SW2Ar(x) (((x) & MC13783_SW1A) >> 0) | ||
| 528 | #define MC13783_SW2ADVS (0x3f << 6) | 513 | #define MC13783_SW2ADVS (0x3f << 6) |
| 529 | #define MC13783_SW2ADVSw(x) (((x) << 6) & MC13783_SW2ADVS) | 514 | #define MC13783_SW2ADVS_POS (6) |
| 530 | #define MC13783_SW2ADVSr(x) (((x) & MC13783_SW2ADVS) >> 6) | ||
| 531 | #define MC13783_SW2ASTBY (0x3f << 12) | 515 | #define MC13783_SW2ASTBY (0x3f << 12) |
| 532 | #define MC13783_SW2ASTBYw(x) (((x) << 12) & MC13783_SW2ASTBY) | 516 | #define MC13783_SW2ASTBY_POS (12) |
| 533 | #define MC13783_SW2ASTBYr(x) (((x) & MC13783_SW2ASTBY) >> 12) | ||
| 534 | 517 | ||
| 535 | /* SWITCHERS3 (27) */ | 518 | /* SWITCHERS3 (27) */ |
| 536 | #define MC13783_SW2B (0x3f << 0) | 519 | #define MC13783_SW2B (0x3f << 0) |
| 537 | #define MC13783_SW2Bw(x) (((x) << 0) & MC13783_SW2B) | 520 | #define MC13783_SW2B_POS (0) |
| 538 | #define MC13783_SW2Br(x) (((x) & MC13783_SW2B) >> 0) | ||
| 539 | #define MC13783_SW2BDVS (0x3f << 6) | 521 | #define MC13783_SW2BDVS (0x3f << 6) |
| 540 | #define MC13783_SW2BDVSw(x) (((x) << 6) & MC13783_SW2BDVS) | 522 | #define MC13783_SW2BDVS_POS (6) |
| 541 | #define MC13783_SW2BDVSr(x) (((x) & MC13783_SW2BDVS) >> 6) | ||
| 542 | #define MC13783_SW2BSTBY (0x3f << 12) | 523 | #define MC13783_SW2BSTBY (0x3f << 12) |
| 543 | #define MC13783_SW2BSTBYw(x) (((x) << 12) & MC13783_SW2BSTBY) | 524 | #define MC13783_SW2BSTBY_POS (12) |
| 544 | #define MC13783_SW2BSTBYr(x) (((x) & MC13783_SW2BSTBY) >> 12) | ||
| 545 | 525 | ||
| 546 | /* SWITCHERS4 (28) */ | 526 | /* SWITCHERS4 (28) */ |
| 547 | #define MC13783_SW1AMODE (0x3 << 0) | 527 | #define MC13783_SW1AMODE (0x3 << 0) |
| @@ -804,30 +784,26 @@ enum mc13783_regs_enum | |||
| 804 | 784 | ||
| 805 | /* AUDIO_RX1 (37) */ | 785 | /* AUDIO_RX1 (37) */ |
| 806 | #define MC13783_PGARXEN (0x1 << 0) | 786 | #define MC13783_PGARXEN (0x1 << 0) |
| 807 | #define MC13783_PGARX (0xf << 1) | ||
| 808 | /* <=0010=-33dB...1101=0dB...1111=+6dB in 3dB steps */ | 787 | /* <=0010=-33dB...1101=0dB...1111=+6dB in 3dB steps */ |
| 809 | #define MC13783_PGARXw(x) (((x) << 1) & MC13783_PGARX) | 788 | #define MC13783_PGARX (0xf << 1) |
| 810 | #define MC13783_PGARXr(x) (((x) & MC13783_PGARX) >> 1) | 789 | #define MC13783_PGARX_POS (1) |
| 811 | #define MC13783_PGASTEN (0x1 << 5) | 790 | #define MC13783_PGASTEN (0x1 << 5) |
| 812 | #define MC13783_PGAST (0xf << 6) | ||
| 813 | /* <=0010=-33dB...1101=0dB...1111=+6dB in 3dB steps */ | 791 | /* <=0010=-33dB...1101=0dB...1111=+6dB in 3dB steps */ |
| 814 | #define MC13783_PGASTw(x) (((x) << 6) & MC13783_PGAST) | 792 | #define MC13783_PGAST (0xf << 6) |
| 815 | #define MC13783_PGASTr(x) (((x) & MC13783_PGAST) >> 6) | 793 | #define MC13783_PGAST_POS (6) |
| 816 | #define MC13783_ARXINEN (0x1 << 10) | 794 | #define MC13783_ARXINEN (0x1 << 10) |
| 817 | #define MC13783_ARXIN (0x1 << 11) | 795 | #define MC13783_ARXIN (0x1 << 11) |
| 818 | #define MC13783_PGARXIN (0xf << 12) | ||
| 819 | /* <=0010=-33dB...1101=0dB...1111=+6dB in 3dB steps */ | 796 | /* <=0010=-33dB...1101=0dB...1111=+6dB in 3dB steps */ |
| 820 | #define MC13783_PGARXINw(x) (((x) << 12) & MC13783_PGARXIN) | 797 | #define MC13783_PGARXIN (0xf << 12) |
| 821 | #define MC13783_PGARXINr(x) (((x) & MC13783_PGARXIN) >> 12) | 798 | #define MC13783_PGARXIN_POS (12) |
| 822 | #define MC13783_MONO (0x3 << 16) | 799 | #define MC13783_MONO (0x3 << 16) |
| 823 | #define MC13783_MONO_LR_INDEPENDENT (0x0 << 16) | 800 | #define MC13783_MONO_LR_INDEPENDENT (0x0 << 16) |
| 824 | #define MC13783_MONO_ST_OPPOSITE (0x1 << 16) | 801 | #define MC13783_MONO_ST_OPPOSITE (0x1 << 16) |
| 825 | #define MC13783_MONO_ST_TO_MONO (0x2 << 16) | 802 | #define MC13783_MONO_ST_TO_MONO (0x2 << 16) |
| 826 | #define MC13783_MONO_MONO_OPPOSITE (0x3 << 16) | 803 | #define MC13783_MONO_MONO_OPPOSITE (0x3 << 16) |
| 827 | #define MC13783_BAL (0x7 << 18) | ||
| 828 | /* 000=-21dB...3dB steps...111=0dB: left or right */ | 804 | /* 000=-21dB...3dB steps...111=0dB: left or right */ |
| 829 | #define MC13783_BALw(x) (((x) << 18) & MC13783_BAL) | 805 | #define MC13783_BAL (0x7 << 18) |
| 830 | #define MC13783_BALr(x) (((x) & MC13783_BAL) >> 18) | 806 | #define MC13783_BAL_POS (18) |
| 831 | #define MC13783_BALLR (0x1 << 21) | 807 | #define MC13783_BALLR (0x1 << 21) |
| 832 | 808 | ||
| 833 | /* AUDIO_TX (38) */ | 809 | /* AUDIO_TX (38) */ |
| @@ -844,14 +820,12 @@ enum mc13783_regs_enum | |||
| 844 | #define MC13783_ATXINEN (0x1 << 11) | 820 | #define MC13783_ATXINEN (0x1 << 11) |
| 845 | #define MC13783_ATXOUTEN (0x1 << 12) | 821 | #define MC13783_ATXOUTEN (0x1 << 12) |
| 846 | #define MC13783_RXINREC (0x1 << 13) | 822 | #define MC13783_RXINREC (0x1 << 13) |
| 823 | /* 00000=-8dB...01000=0dB...11111=+23dB */ | ||
| 847 | #define MC13783_PGATXR (0x1f << 14) | 824 | #define MC13783_PGATXR (0x1f << 14) |
| 825 | #define MC13783_PGATXR_POS (14) | ||
| 848 | /* 00000=-8dB...01000=0dB...11111=+23dB */ | 826 | /* 00000=-8dB...01000=0dB...11111=+23dB */ |
| 849 | #define MC13783_PGATXRw(x) (((x) << 14) & MC13783_PGATXR) | ||
| 850 | #define MC13783_PGATXRr(x) (((x) & MC13783_PGATXR) >> 14) | ||
| 851 | #define MC13783_PGATXL (0x1f << 19) | 827 | #define MC13783_PGATXL (0x1f << 19) |
| 852 | /* 00000=-8dB...01000=0dB...11111=+23dB */ | 828 | #define MC13783_PGATXL_POS (19) |
| 853 | #define MC13783_PGATXLw(x) (((x) << 19) & MC13783_PGATXL) | ||
| 854 | #define MC13783_PGATXLr(x) (((x) & MC13783_PGATXL) >> 19) | ||
| 855 | 829 | ||
| 856 | /* SSI_NETWORK (39) */ | 830 | /* SSI_NETWORK (39) */ |
| 857 | #define MC13783_CDCTXRXSLOT (0x3 << 2) | 831 | #define MC13783_CDCTXRXSLOT (0x3 << 2) |
| @@ -869,10 +843,9 @@ enum mc13783_regs_enum | |||
| 869 | #define MC13783_CDCRXSECSLOT_TS1 (0x1 << 6) | 843 | #define MC13783_CDCRXSECSLOT_TS1 (0x1 << 6) |
| 870 | #define MC13783_CDCRXSECSLOT_TS2 (0x2 << 6) | 844 | #define MC13783_CDCRXSECSLOT_TS2 (0x2 << 6) |
| 871 | #define MC13783_CDCRXSECSLOT_TS3 (0x3 << 6) | 845 | #define MC13783_CDCRXSECSLOT_TS3 (0x3 << 6) |
| 872 | #define MC13783_CDCRXSECGAIN (0x3 << 8) | ||
| 873 | /* -inf, -0dB, -6dB, -12dB */ | 846 | /* -inf, -0dB, -6dB, -12dB */ |
| 874 | #define MC13783_CDCRXSECGAINw(x) (((x) << 8) & MC13783_CDCRXSECGAIN) | 847 | #define MC13783_CDCRXSECGAIN (0x3 << 8) |
| 875 | #define MC13783_CDCRXSECGAINr(x) (((x) & MC13783_CDCRXSECGAIN) >> 8) | 848 | #define MC13783_CDCRXSECGAIN_POS (8) |
| 876 | #define MC13783_CDCSUMGAIN (0x1 << 10) | 849 | #define MC13783_CDCSUMGAIN (0x1 << 10) |
| 877 | #define MC13783_CDCFSDLY (0x1 << 11) | 850 | #define MC13783_CDCFSDLY (0x1 << 11) |
| 878 | #define MC13783_STDCSLOTS (0x3 << 12) | 851 | #define MC13783_STDCSLOTS (0x3 << 12) |
| @@ -890,10 +863,9 @@ enum mc13783_regs_enum | |||
| 890 | #define MC13783_STDCRXSECSLOT_TS2_TS3 (0x1 << 16) | 863 | #define MC13783_STDCRXSECSLOT_TS2_TS3 (0x1 << 16) |
| 891 | #define MC13783_STDCRXSECSLOT_TS4_TS5 (0x2 << 16) | 864 | #define MC13783_STDCRXSECSLOT_TS4_TS5 (0x2 << 16) |
| 892 | #define MC13783_STDCRXSECSLOT_TS6_TS7 (0x3 << 16) | 865 | #define MC13783_STDCRXSECSLOT_TS6_TS7 (0x3 << 16) |
| 893 | #define MC13783_STDCRXSECGAIN (0x3 << 18) | ||
| 894 | /* -inf, -0dB, -6dB, -12dB */ | 866 | /* -inf, -0dB, -6dB, -12dB */ |
| 895 | #define MC13783_STDCRXSECGAINw(x) (((x) << 8) & MC13783_STDCRXSECGAIN) | 867 | #define MC13783_STDCRXSECGAIN (0x3 << 18) |
| 896 | #define MC13783_STDCRXSECGAINr(x) (((x) & MC13783_STDCRXSECGAIN) >> 8) | 868 | #define MC13783_STDCRXSECGAIN_POS (18) |
| 897 | #define MC13783_STDSUMGAIN (0x1 << 20) | 869 | #define MC13783_STDSUMGAIN (0x1 << 20) |
| 898 | 870 | ||
| 899 | /* AUDIO_CODEC (40) */ | 871 | /* AUDIO_CODEC (40) */ |
| @@ -988,14 +960,11 @@ enum mc13783_regs_enum | |||
| 988 | #define MC13783_ADSEL (0x1 << 3) | 960 | #define MC13783_ADSEL (0x1 << 3) |
| 989 | #define MC13783_TRIGMASK (0x1 << 4) | 961 | #define MC13783_TRIGMASK (0x1 << 4) |
| 990 | #define MC13783_ADA1 (0x7 << 5) | 962 | #define MC13783_ADA1 (0x7 << 5) |
| 991 | #define MC13783_ADA1w(x) (((x) << 5) & MC13783_ADA1) | 963 | #define MC13783_ADA1_POS (5) |
| 992 | #define MC13783_ADA1r(x) (((x) & MC13783_ADA1) >> 5) | ||
| 993 | #define MC13783_ADA2 (0x7 << 8) | 964 | #define MC13783_ADA2 (0x7 << 8) |
| 994 | #define MC13783_ADA2w(x) (((x) << 8) & MC13783_ADA2) | 965 | #define MC13783_ADA2_POS (8) |
| 995 | #define MC13783_ADA2r(x) (((x) & MC13783_ADA2) >> 8) | ||
| 996 | #define MC13783_ATO (0xff << 11) | 966 | #define MC13783_ATO (0xff << 11) |
| 997 | #define MC13783_ATOw(x) (((x) << 11) & MC13783_ATO) | 967 | #define MC13783_ATO_POS (11) |
| 998 | #define MC13783_ATOr(x) (((x) & MC13783_ATO) >> 11) | ||
| 999 | #define MC13783_ATOX (0x1 << 19) | 968 | #define MC13783_ATOX (0x1 << 19) |
| 1000 | #define MC13783_ASC (0x1 << 20) | 969 | #define MC13783_ASC (0x1 << 20) |
| 1001 | #define MC13783_ADTRIGIGN (0x1 << 21) | 970 | #define MC13783_ADTRIGIGN (0x1 << 21) |
| @@ -1004,26 +973,24 @@ enum mc13783_regs_enum | |||
| 1004 | 973 | ||
| 1005 | /* ADC2 (45) */ | 974 | /* ADC2 (45) */ |
| 1006 | #define MC13783_ADD1 (0x3ff << 2) | 975 | #define MC13783_ADD1 (0x3ff << 2) |
| 1007 | #define MC13783_ADD1r(x) (((x) & MC13783_ADD1) >> 2) | 976 | #define MC13783_ADD1_POS (2) |
| 1008 | #define MC13783_ADD2 (0x3ff << 14) | 977 | #define MC13783_ADD2 (0x3ff << 14) |
| 1009 | #define MC13783_ADD2r(x) (((x) & MC13783_ADD2) >> 14) | 978 | #define MC13783_ADD2_POS (14) |
| 1010 | 979 | ||
| 1011 | /* ADC3 (46) */ | 980 | /* ADC3 (46) */ |
| 1012 | #define MC13783_WHIGH (0x3f << 0) | 981 | #define MC13783_WHIGH (0x3f << 0) |
| 1013 | #define MC13783_WHIGHw(x) (((x) << 0) & MC13783_WHIGH) | 982 | #define MC13783_WHIGH_POS (0) |
| 1014 | #define MC13783_WHIGHr(x) (((x) & MC13783_WHIGH) >> 0) | ||
| 1015 | #define MC13783_ICID (0x7 << 6) | 983 | #define MC13783_ICID (0x7 << 6) |
| 1016 | #define MC13783_ICIDr(x) (((x) & MC13783_ICID) >> 6) | 984 | #define MC13783_ICID_POS (6) |
| 1017 | #define MC13783_WLOW (0x3f << 9) | 985 | #define MC13783_WLOW (0x3f << 9) |
| 1018 | #define MC13783_WLOWw(x) (((x) << 9) & MC13783_WLOW) | 986 | #define MC13783_WLOW_POS (9) |
| 1019 | #define MC13783_WLOWr(x) (((x) & MC13783_WLOW) >> 9) | ||
| 1020 | #define MC13783_ADCBIS2_ACCESS (0x1 << 23) | 987 | #define MC13783_ADCBIS2_ACCESS (0x1 << 23) |
| 1021 | 988 | ||
| 1022 | /* ADC4 (47) */ | 989 | /* ADC4 (47) */ |
| 1023 | #define MC13783_ADCBIS1 (0x3ff << 2) | 990 | #define MC13783_ADCBIS1 (0x3ff << 2) |
| 1024 | #define MC13783_ADCBIS1r(x) (((x) & MC13783_ADCBIS1) >> 2) | 991 | #define MC13783_ADCBIS1_POS (2) |
| 1025 | #define MC13783_ADCBIS2 (0x3ff << 14) | 992 | #define MC13783_ADCBIS2 (0x3ff << 14) |
| 1026 | #define MC13783_ADCBIS2r(x) (((x) & MC13783_ADCBIS2) >> 14) | 993 | #define MC13783_ADCBIS2_POS (14) |
| 1027 | 994 | ||
| 1028 | /* CHARGER (48) */ | 995 | /* CHARGER (48) */ |
| 1029 | #define MC13783_VCHRG (0x7 << 0) | 996 | #define MC13783_VCHRG (0x7 << 0) |
| @@ -1036,8 +1003,7 @@ enum mc13783_regs_enum | |||
| 1036 | #define MC13783_VCHRG_3_800V (0x6 << 0) | 1003 | #define MC13783_VCHRG_3_800V (0x6 << 0) |
| 1037 | #define MC13783_VCHRG_4_500V (0x7 << 0) | 1004 | #define MC13783_VCHRG_4_500V (0x7 << 0) |
| 1038 | #define MC13783_ICHRG (0xf << 3) /* Min Nom Max */ | 1005 | #define MC13783_ICHRG (0xf << 3) /* Min Nom Max */ |
| 1039 | #define MC13783_ICHRGw(x) (((x) << 3) & MC13783_ICHRG) | 1006 | #define MC13783_ICHRG_POS (3) |
| 1040 | #define MC13783_ICHRGr(x) (((x) & MC13783_ICHRG) >> 3) | ||
| 1041 | #define MC13783_ICHRG_0MA (0x0 << 3) /* 0 0 0 */ | 1007 | #define MC13783_ICHRG_0MA (0x0 << 3) /* 0 0 0 */ |
| 1042 | #define MC13783_ICHRG_70MA (0x1 << 3) /* 55 70 85 */ | 1008 | #define MC13783_ICHRG_70MA (0x1 << 3) /* 55 70 85 */ |
| 1043 | #define MC13783_ICHRG_177MA (0x2 << 3) /* 161 177 195 */ | 1009 | #define MC13783_ICHRG_177MA (0x2 << 3) /* 161 177 195 */ |
| @@ -1055,8 +1021,7 @@ enum mc13783_regs_enum | |||
| 1055 | #define MC13783_ICHRG_1596MA (0xe << 3) /* 1450 1596 1755 */ | 1021 | #define MC13783_ICHRG_1596MA (0xe << 3) /* 1450 1596 1755 */ |
| 1056 | #define MC13783_ICHRG_FULLY_ON (0xf << 3) /* Disallow HW FET turn on */ | 1022 | #define MC13783_ICHRG_FULLY_ON (0xf << 3) /* Disallow HW FET turn on */ |
| 1057 | #define MC13783_ICHRGTR (0x7 << 7) /* Min Nom Max */ | 1023 | #define MC13783_ICHRGTR (0x7 << 7) /* Min Nom Max */ |
| 1058 | #define MC13783_ICHRGTRw(x) (((x) << 7) & MC13783_ICHRGTR) | 1024 | #define MC13783_ICHRGTR_POS (7) |
| 1059 | #define MC13783_ICHRGTRr(x) (((x) & MC13783_ICHRGTR) >> 7) | ||
| 1060 | #define MC13783_ICHRGTR_0MA (0x0 << 7) /* 0 0 0 */ | 1025 | #define MC13783_ICHRGTR_0MA (0x0 << 7) /* 0 0 0 */ |
| 1061 | #define MC13783_ICHRGTR_9MA (0x1 << 7) /* 6 9 12 */ | 1026 | #define MC13783_ICHRGTR_9MA (0x1 << 7) /* 6 9 12 */ |
| 1062 | #define MC13783_ICHRGTR_20MA (0x2 << 7) /* 14 20 26 */ | 1027 | #define MC13783_ICHRGTR_20MA (0x2 << 7) /* 14 20 26 */ |
| @@ -1148,8 +1113,7 @@ enum mc13783_regs_enum | |||
| 1148 | #define MC13783_ABREF_600MV (0x2 << 14) | 1113 | #define MC13783_ABREF_600MV (0x2 << 14) |
| 1149 | #define MC13783_ABREF_800MV (0x3 << 14) | 1114 | #define MC13783_ABREF_800MV (0x3 << 14) |
| 1150 | #define MC13783_FLPATTRN (0xf << 17) | 1115 | #define MC13783_FLPATTRN (0xf << 17) |
| 1151 | #define MC13783_FLPATTRNw(x) (((x) << 17) & MC13783_FLPATTRN) | 1116 | #define MC13783_FLPATTRN_POS (17) |
| 1152 | #define MC13783_FLPATTRNr(x) (((x) & MC13783_FLPATTRN) >> 17) | ||
| 1153 | #define MC13783_FLBANK1 (0x1 << 21) | 1117 | #define MC13783_FLBANK1 (0x1 << 21) |
| 1154 | #define MC13783_FLBANK2 (0x1 << 22) | 1118 | #define MC13783_FLBANK2 (0x1 << 22) |
| 1155 | #define MC13783_FLBANK3 (0x1 << 23) | 1119 | #define MC13783_FLBANK3 (0x1 << 23) |
| @@ -1178,98 +1142,70 @@ enum mc13783_regs_enum | |||
| 1178 | 1142 | ||
| 1179 | /* LED_CONTROL2 (53) */ | 1143 | /* LED_CONTROL2 (53) */ |
| 1180 | #define MC13783_LEDMD (0x7 << 0) | 1144 | #define MC13783_LEDMD (0x7 << 0) |
| 1181 | #define MC13783_LEDMDw(x) (((x) << 0) & MC13783_LEDMD) | 1145 | #define MC13783_LEDMD_POS (0) |
| 1182 | #define MC13783_LEDMDr(x) (((x) & MC13783_LEDMD) >> 0) | ||
| 1183 | #define MC13783_LEDAD (0x7 << 3) | 1146 | #define MC13783_LEDAD (0x7 << 3) |
| 1184 | #define MC13783_LEDADw(x) (((x) << 3) & MC13783_LEDAD) | 1147 | #define MC13783_LEDAD_POS (3) |
| 1185 | #define MC13783_LEDADr(x) (((x) & MC13783_LEDAD) >> 3) | ||
| 1186 | #define MC13783_LEDKP (0x7 << 6) | 1148 | #define MC13783_LEDKP (0x7 << 6) |
| 1187 | #define MC13783_LEDKPw(x) (((x) << 6) & MC13783_LEDKP) | 1149 | #define MC13783_LEDKP_POS (6) |
| 1188 | #define MC13783_LEDKPr(x) (((x) & MC13783_LEDKP) >> 6) | ||
| 1189 | #define MC13783_LEDMDDC (0xf << 9) | 1150 | #define MC13783_LEDMDDC (0xf << 9) |
| 1190 | #define MC13783_LEDMDDCw(x) (((x) << 9) & MC13783_LEDMDDC) | 1151 | #define MC13783_LEDMDDC_POS (9) |
| 1191 | #define MC13783_LEDMDDCr(x) (((x) & MC13783_LEDMDDC) >> 9) | ||
| 1192 | #define MC13783_LEDADDC (0xf << 13) | 1152 | #define MC13783_LEDADDC (0xf << 13) |
| 1193 | #define MC13783_LEDADDCw(x) (((x) << 13) & MC13783_LEDADDC) | 1153 | #define MC13783_LEDADDC_POS (13) |
| 1194 | #define MC13783_LEDADDCr(x) (((x) & MC13783_LEDADDC) >> 13) | ||
| 1195 | #define MC13783_LEDKPDC (0xf << 17) | 1154 | #define MC13783_LEDKPDC (0xf << 17) |
| 1196 | #define MC13783_LEDKPDCw(x) (((x) << 17) & MC13783_LEDKPDC) | 1155 | #define MC13783_LEDKPDC_POS (17) |
| 1197 | #define MC13783_LEDKPDCr(x) (((x) & MC13783_LEDKPDC) >> 17) | ||
| 1198 | #define MC13783_BLPERIOD (0x1 << 21) | 1156 | #define MC13783_BLPERIOD (0x1 << 21) |
| 1199 | #define MC13783_BLPERIODw(x) (((x) << 21) & MC13783_BLPERIOD) | 1157 | #define MC13783_BLPERIOD_POS (21) |
| 1200 | #define MC13783_BLPERIODr(x) (((x) & MC13783_BLPERIOD) >> 21) | ||
| 1201 | #define MC13783_SLEWLIMBL (0x1 << 23) | 1158 | #define MC13783_SLEWLIMBL (0x1 << 23) |
| 1202 | 1159 | ||
| 1203 | /* LED_CONTROL3 (54) */ | 1160 | /* LED_CONTROL3 (54) */ |
| 1204 | #define MC13783_LEDR1 (0x3 << 0) | 1161 | #define MC13783_LEDR1 (0x3 << 0) |
| 1205 | #define MC13783_LEDR1w(x) (((x) << 0) & MC13783_LEDR1) | 1162 | #define MC13783_LEDR1_POS (0) |
| 1206 | #define MC13783_LEDR1r(x) (((x) & MC13783_LEDR1) >> 0) | ||
| 1207 | #define MC13783_LEDG1 (0x3 << 2) | 1163 | #define MC13783_LEDG1 (0x3 << 2) |
| 1208 | #define MC13783_LEDG1w(x) (((x) << 2) & MC13783_LEDG1) | 1164 | #define MC13783_LEDG1_POS (2) |
| 1209 | #define MC13783_LEDG1r(x) (((x) & MC13783_LEDG1) >> 2) | ||
| 1210 | #define MC13783_LEDB1 (0x3 << 4) | 1165 | #define MC13783_LEDB1 (0x3 << 4) |
| 1211 | #define MC13783_LEDB1w(x) (((x) << 4) & MC13783_LEDB1) | 1166 | #define MC13783_LEDB1_POS (4) |
| 1212 | #define MC13783_LEDB1r(x) (((x) & MC13783_LEDB1) >> 4) | ||
| 1213 | #define MC13783_LEDR1DC (0x1f << 6) | 1167 | #define MC13783_LEDR1DC (0x1f << 6) |
| 1214 | #define MC13783_LEDR1DCw(x) (((x) << 6) & MC13783_LEDR1DC) | 1168 | #define MC13783_LEDR1DC_POS (6) |
| 1215 | #define MC13783_LEDR1DCr(x) (((x) & MC13783_LEDR1DC) >> 6) | ||
| 1216 | #define MC13783_LEDG1DC (0x1f << 11) | 1169 | #define MC13783_LEDG1DC (0x1f << 11) |
| 1217 | #define MC13783_LEDG1DCw(x) (((x) << 11) & MC13783_LEDG1DC) | 1170 | #define MC13783_LEDG1DC_POS (11) |
| 1218 | #define MC13783_LEDG1DCr(x) (((x) & MC13783_LEDG1DC) >> 11) | ||
| 1219 | #define MC13783_LEDB1DC (0x1f << 16) | 1171 | #define MC13783_LEDB1DC (0x1f << 16) |
| 1220 | #define MC13783_LEDB1DCw(x) (((x) << 16) & MC13783_LEDB1DC) | 1172 | #define MC13783_LEDB1DC_POS (16) |
| 1221 | #define MC13783_LEDB1DCr(x) (((x) & MC13783_LEDB1DC) >> 16) | ||
| 1222 | #define MC13783_TC1PERIOD (0x3 << 21) | 1173 | #define MC13783_TC1PERIOD (0x3 << 21) |
| 1223 | #define MC13783_TC1PERIODw(x) (((x) << 21) & MC13783_TC1PERIOD) | 1174 | #define MC13783_TC1PERIOD_POS (21) |
| 1224 | #define MC13783_TC1PERIODr(x) (((x) & MC13783_TC1PERIOD) >> 21) | ||
| 1225 | #define MC13783_TC1TRIODE (0x1 << 23) | 1175 | #define MC13783_TC1TRIODE (0x1 << 23) |
| 1226 | 1176 | ||
| 1227 | /* LED_CONTROL4 (55) */ | 1177 | /* LED_CONTROL4 (55) */ |
| 1228 | #define MC13783_LEDR2 (0x3 << 0) | 1178 | #define MC13783_LEDR2 (0x3 << 0) |
| 1229 | #define MC13783_LEDR2w(x) (((x) << 0) & MC13783_LEDR2) | 1179 | #define MC13783_LEDR2_POS (0) |
| 1230 | #define MC13783_LEDR2r(x) (((x) & MC13783_LEDR2) >> 0) | ||
| 1231 | #define MC13783_LEDG2 (0x3 << 2) | 1180 | #define MC13783_LEDG2 (0x3 << 2) |
| 1232 | #define MC13783_LEDG2w(x) (((x) << 2) & MC13783_LEDG2) | 1181 | #define MC13783_LEDG2_POS (2) |
| 1233 | #define MC13783_LEDG2r(x) (((x) & MC13783_LEDG2) >> 2) | ||
| 1234 | #define MC13783_LEDB2 (0x3 << 4) | 1182 | #define MC13783_LEDB2 (0x3 << 4) |
| 1235 | #define MC13783_LEDB2w(x) (((x) << 4) & MC13783_LEDB2) | 1183 | #define MC13783_LEDB2_POS (4) |
| 1236 | #define MC13783_LEDB2r(x) (((x) & MC13783_LEDB2) >> 4) | ||
| 1237 | #define MC13783_LEDR2DC (0x1f << 6) | 1184 | #define MC13783_LEDR2DC (0x1f << 6) |
| 1238 | #define MC13783_LEDR2DCw(x) (((x) << 6) & MC13783_LEDR2DC) | 1185 | #define MC13783_LEDR2DC_POS (6) |
| 1239 | #define MC13783_LEDR2DCr(x) (((x) & MC13783_LEDR2DC) >> 6) | ||
| 1240 | #define MC13783_LEDG2DC (0x1f << 11) | 1186 | #define MC13783_LEDG2DC (0x1f << 11) |
| 1241 | #define MC13783_LEDG2DCw(x) (((x) << 11) & MC13783_LEDG2DC) | 1187 | #define MC13783_LEDG2DC_POS (11) |
| 1242 | #define MC13783_LEDG2DCr(x) (((x) & MC13783_LEDG2DC) >> 11) | ||
| 1243 | #define MC13783_LEDB2DC (0x1f << 16) | 1188 | #define MC13783_LEDB2DC (0x1f << 16) |
| 1244 | #define MC13783_LEDB2DCw(x) (((x) << 16) & MC13783_LEDB2DC) | 1189 | #define MC13783_LEDB2DC_POS (16) |
| 1245 | #define MC13783_LEDB2DCr(x) (((x) & MC13783_LEDB2DC) >> 16) | ||
| 1246 | #define MC13783_TC2PERIOD (0x3 << 21) | 1190 | #define MC13783_TC2PERIOD (0x3 << 21) |
| 1247 | #define MC13783_TC2PERIODw(x) (((x) << 21) & MC13783_TC2PERIOD) | 1191 | #define MC13783_TC2PERIOD_POS (21) |
| 1248 | #define MC13783_TC2PERIODr(x) (((x) & MC13783_TC2PERIOD) >> 21) | ||
| 1249 | #define MC13783_TC2TRIODE (0x1 << 23) | 1192 | #define MC13783_TC2TRIODE (0x1 << 23) |
| 1250 | 1193 | ||
| 1251 | /* LED_CONTROL5 (56) */ | 1194 | /* LED_CONTROL5 (56) */ |
| 1252 | #define MC13783_LEDR3 (0x3 << 0) | 1195 | #define MC13783_LEDR3 (0x3 << 0) |
| 1253 | #define MC13783_LEDR3w(x) (((x) << 0) & MC13783_LEDR3) | 1196 | #define MC13783_LEDR3_POS (0) |
| 1254 | #define MC13783_LEDR3r(x) (((x) & MC13783_LEDR3) >> 0) | ||
| 1255 | #define MC13783_LEDG3 (0x3 << 2) | 1197 | #define MC13783_LEDG3 (0x3 << 2) |
| 1256 | #define MC13783_LEDG3w(x) (((x) << 2) & MC13783_LEDG3) | 1198 | #define MC13783_LEDG3_POS (2) |
| 1257 | #define MC13783_LEDG3r(x) (((x) & MC13783_LEDG3) >> 2) | ||
| 1258 | #define MC13783_LEDB3 (0x3 << 4) | 1199 | #define MC13783_LEDB3 (0x3 << 4) |
| 1259 | #define MC13783_LEDB3w(x) (((x) << 4) & MC13783_LEDB3) | 1200 | #define MC13783_LEDB3_POS (4) |
| 1260 | #define MC13783_LEDB3r(x) (((x) & MC13783_LEDB3) >> 4) | ||
| 1261 | #define MC13783_LEDR3DC (0x1f << 6) | 1201 | #define MC13783_LEDR3DC (0x1f << 6) |
| 1262 | #define MC13783_LEDR3DCw(x) (((x) << 6) & MC13783_LEDR3DC) | 1202 | #define MC13783_LEDR3DC_POS (6) |
| 1263 | #define MC13783_LEDR3DCr(x) (((x) & MC13783_LEDR3DC) >> 6) | ||
| 1264 | #define MC13783_LEDG3DC (0x1f << 11) | 1203 | #define MC13783_LEDG3DC (0x1f << 11) |
| 1265 | #define MC13783_LEDG3DCw(x) (((x) << 11) & MC13783_LEDG3DC) | 1204 | #define MC13783_LEDG3DC_POS (11) |
| 1266 | #define MC13783_LEDG3DCr(x) (((x) & MC13783_LEDG3DC) >> 11) | ||
| 1267 | #define MC13783_LEDB3DC (0x1f << 16) | 1205 | #define MC13783_LEDB3DC (0x1f << 16) |
| 1268 | #define MC13783_LEDB3DCw(x) (((x) << 16) & MC13783_LEDB3DC) | 1206 | #define MC13783_LEDB3DC_POS (16) |
| 1269 | #define MC13783_LEDB3DCr(x) (((x) & MC13783_LEDB3DC) >> 16) | ||
| 1270 | #define MC13783_TC3PERIOD (0x3 << 21) | 1207 | #define MC13783_TC3PERIOD (0x3 << 21) |
| 1271 | #define MC13783_TC3PERIODw(x) (((x) << 21) & MC13783_TC3PERIOD) | 1208 | #define MC13783_TC3PERIOD_POS (21) |
| 1272 | #define MC13783_TC3PERIODr(x) (((x) & MC13783_TC3PERIOD) >> 21) | ||
| 1273 | #define MC13783_TC3TRIODE (0x1 << 23) | 1209 | #define MC13783_TC3TRIODE (0x1 << 23) |
| 1274 | 1210 | ||
| 1275 | /* For event enum values which are target-defined */ | 1211 | /* For event enum values which are target-defined */ |