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-rw-r--r--firmware/export/dm320.h51
1 files changed, 51 insertions, 0 deletions
diff --git a/firmware/export/dm320.h b/firmware/export/dm320.h
index a629586be8..def8508b0b 100644
--- a/firmware/export/dm320.h
+++ b/firmware/export/dm320.h
@@ -870,6 +870,8 @@ extern unsigned long _ttbstart;
870#define CLK_MOD2_TMR0 (1 << 1) 870#define CLK_MOD2_TMR0 (1 << 1)
871#define CLK_MOD2_WDT (1 << 0) 871#define CLK_MOD2_WDT (1 << 0)
872 872
873#define CLK_SEL0_UART0 (1 << 5)
874
873#define CLK_SEL1_OSD (1 << 12) 875#define CLK_SEL1_OSD (1 << 12)
874#define CLK_SEL1_CCD (1 << 8) 876#define CLK_SEL1_CCD (1 << 8)
875#define CLK_SEL1_VENCPLL (1 << 4) 877#define CLK_SEL1_VENCPLL (1 << 4)
@@ -884,6 +886,55 @@ extern unsigned long _ttbstart;
884#define CLK_BYP_DSP (1 << 4) 886#define CLK_BYP_DSP (1 << 4)
885#define CLK_BYP_ARM (1 << 0) 887#define CLK_BYP_ARM (1 << 0)
886 888
889#define CLK_INV_MMC (1 << 0)
890#define CLK_INV_VENC (1 << 4)
891#define CLK_INV_CCD (1 << 8)
892#define CLK_INV_SIF0 (1 << 12)
893#define CLK_INV_SIF1 (1 << 13)
894
895#define MMC_CTRL_DATRST (1 << 0)
896#define MMC_CTRL_CMDRST (1 << 1)
897#define MMC_CTRL_WIDTH (1 << 2)
898#define MMC_CTRL_DMASZEN (1 << 4)
899#define MMC_CTRL_TEST2 (1 << 8)
900#define MMC_CTRL_PERMDR (1 << 9)
901#define MMC_CTRL_PERMDX (1 << 10)
902
903#define MMC_CMD_CMD_MASK (0x3F)
904#define MMC_CMD_PPLEN (1 << 7)
905#define MMC_CMD_BSYEXP (1 << 8)
906#define MMC_CMD_RSPFMT_SHIFT 9
907#define MMC_CMD_RSPFMT_MASK (3 << MMC_CMD_RSPFMT_SHIFT)
908#define MMC_CMD_WRITE (1 << 11)
909#define MMC_CMD_STREAM (1 << 12)
910#define MMC_CMD_DATA (1 << 13)
911#define MMC_CMD_INITCLK (1 << 14)
912#define MMC_CMD_DCLR (1 << 15)
913
914#define MMC_ST0_DATDNE (1 << 0)
915#define MMC_ST0_BSYDNE (1 << 1)
916#define MMC_ST0_RSPDNE (1 << 2)
917#define MMC_ST0_DATA_TIMEOUT (1 << 3)
918#define MMC_ST0_CMD_TIMEOUT (1 << 4)
919#define MMC_ST0_WR_CRCERR (1 << 5)
920#define MMC_ST0_RD_CRCERR (1 << 6)
921#define MMC_ST0_RESP_CRCERR (1 << 7)
922#define MMC_ST0_DMADNE (1 << 8)
923#define MMC_ST0_DXRDY (1 << 9)
924#define MMC_ST0_DRRDY (1 << 10)
925#define MMC_ST0_DAT3_EDGE (1 << 11)
926
927#define MMC_ST1_BUSY (1 << 0)
928#define MMC_ST1_CLKSTP (1 << 1)
929#define MMC_ST1_DXEMPTY (1 << 2)
930#define MMC_ST1_DXFULL (1 << 3)
931#define MMC_ST1_DAT3ST (1 << 4)
932
933#define MMC_DMAMODE_RD_WORDSWAP (1 << 10)
934#define MMC_DMAMODE_WR_WORDSWAP (1 << 11)
935#define MMC_DMAMODE_WRITE (1 << 12)
936#define MMC_DMAMODE_ENABLE (1 << 13)
937#define MMC_DMAMODE_TIMEOUTIRQ_EN (1 << 14)
887/* 938/*
888 * IO_EINTx bits 939 * IO_EINTx bits
889 */ 940 */