diff options
Diffstat (limited to 'firmware/export/config.h')
-rw-r--r-- | firmware/export/config.h | 53 |
1 files changed, 48 insertions, 5 deletions
diff --git a/firmware/export/config.h b/firmware/export/config.h index 46d4336e70..46c4d3dfd2 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h | |||
@@ -282,9 +282,13 @@ | |||
282 | #define HAVE_EXTENDED_MESSAGING_AND_NAME | 282 | #define HAVE_EXTENDED_MESSAGING_AND_NAME |
283 | #endif | 283 | #endif |
284 | 284 | ||
285 | #if (CONFIG_CODEC == SWCODEC) && !defined(SIMULATOR) && !defined(BOOTLOADER) | 285 | #if (CONFIG_CODEC == SWCODEC) && !defined(BOOTLOADER) |
286 | #ifndef SIMULATOR | ||
286 | #define HAVE_PRIORITY_SCHEDULING | 287 | #define HAVE_PRIORITY_SCHEDULING |
287 | #define HAVE_SCHEDULER_BOOSTCTRL | 288 | #define HAVE_SCHEDULER_BOOSTCTRL |
289 | #endif /* SIMULATOR */ | ||
290 | #define HAVE_SEMAPHORE_OBJECTS | ||
291 | #define HAVE_EVENT_OBJECTS | ||
288 | #endif | 292 | #endif |
289 | 293 | ||
290 | /* define for all cpus from SH family */ | 294 | /* define for all cpus from SH family */ |
@@ -363,31 +367,70 @@ | |||
363 | #define IRAM_LCDFRAMEBUFFER | 367 | #define IRAM_LCDFRAMEBUFFER |
364 | #endif | 368 | #endif |
365 | 369 | ||
370 | /* Change this if you want to build a single-core firmware for a multicore | ||
371 | * target for debugging */ | ||
372 | #if defined(BOOTLOADER) | ||
373 | #define FORCE_SINGLE_CORE | ||
374 | #endif | ||
375 | |||
376 | /* Core locking types - specifies type of atomic operation */ | ||
377 | #define CORELOCK_NONE 0 | ||
378 | #define SW_CORELOCK 1 /* Mutual exclusion provided by a software algorithm | ||
379 | and not a special semaphore instruction */ | ||
380 | #define CORELOCK_SWAP 2 /* A swap (exchange) instruction */ | ||
381 | |||
366 | /* Dual core support - not yet working on the 1G/2G and 3G iPod */ | 382 | /* Dual core support - not yet working on the 1G/2G and 3G iPod */ |
367 | #if defined(CPU_PP) | 383 | #if defined(CPU_PP) |
368 | #define IDLE_STACK_SIZE 0x80 | 384 | #define IDLE_STACK_SIZE 0x80 |
369 | #define IDLE_STACK_WORDS 0x20 | 385 | #define IDLE_STACK_WORDS 0x20 |
370 | 386 | ||
371 | #if !defined(BOOTLOADER) && CONFIG_CPU != PP5002 | 387 | #if !defined(FORCE_SINGLE_CORE) && CONFIG_CPU != PP5002 |
388 | |||
372 | #define NUM_CORES 2 | 389 | #define NUM_CORES 2 |
373 | #define CURRENT_CORE current_core() | 390 | #define CURRENT_CORE current_core() |
374 | /* Hopefully at some point we will learn how to mark areas of main memory as | 391 | /* Use IRAM for variables shared across cores - large memory buffers should |
375 | * not to be cached. Until then, use IRAM for variables shared across cores */ | 392 | * use UNCACHED_ADDR(a) and be appropriately aligned and padded */ |
376 | #define NOCACHEBSS_ATTR IBSS_ATTR | 393 | #define NOCACHEBSS_ATTR IBSS_ATTR |
377 | #define NOCACHEDATA_ATTR IDATA_ATTR | 394 | #define NOCACHEDATA_ATTR IDATA_ATTR |
378 | 395 | ||
379 | #define IF_COP(...) __VA_ARGS__ | 396 | #define IF_COP(...) __VA_ARGS__ |
397 | #define IF_COP_VOID(...) __VA_ARGS__ | ||
398 | #define IF_COP_CORE(core) core | ||
399 | |||
400 | #if CONFIG_CPU == PP5020 | ||
401 | #define CONFIG_CORELOCK SW_CORELOCK /* SWP(B) is broken */ | ||
402 | #else | ||
403 | #define CONFIG_CORELOCK CORELOCK_SWAP | ||
404 | #endif | ||
405 | |||
380 | #endif /* !defined(BOOTLOADER) && CONFIG_CPU != PP5002 */ | 406 | #endif /* !defined(BOOTLOADER) && CONFIG_CPU != PP5002 */ |
407 | |||
381 | #endif /* CPU_PP */ | 408 | #endif /* CPU_PP */ |
382 | 409 | ||
410 | #ifndef CONFIG_CORELOCK | ||
411 | #define CONFIG_CORELOCK CORELOCK_NONE | ||
412 | #endif | ||
413 | |||
414 | #if CONFIG_CORELOCK == SW_CORELOCK | ||
415 | #define IF_SWCL(...) __VA_ARGS__ | ||
416 | #define IFN_SWCL(...) | ||
417 | #else | ||
418 | #define IF_SWCL(...) | ||
419 | #define IFN_SWCL(...) __VA_ARGS__ | ||
420 | #endif /* CONFIG_CORELOCK == */ | ||
421 | |||
383 | #ifndef NUM_CORES | 422 | #ifndef NUM_CORES |
384 | /* Default to single core */ | 423 | /* Default to single core */ |
385 | #define NUM_CORES 1 | 424 | #define NUM_CORES 1 |
386 | #define CURRENT_CORE CPU | 425 | #define CURRENT_CORE CPU |
387 | #define NOCACHEBSS_ATTR | 426 | #define NOCACHEBSS_ATTR |
388 | #define NOCACHEDATA_ATTR | 427 | #define NOCACHEDATA_ATTR |
428 | #define CONFIG_CORELOCK CORELOCK_NONE | ||
389 | 429 | ||
390 | #define IF_COP(...) | 430 | #define IF_COP(...) |
431 | #define IF_COP_VOID(...) void | ||
432 | #define IF_COP_CORE(core) CURRENT_CORE | ||
433 | |||
391 | #endif /* NUM_CORES */ | 434 | #endif /* NUM_CORES */ |
392 | 435 | ||
393 | #endif /* __CONFIG_H__ */ | 436 | #endif /* __CONFIG_H__ */ |