diff options
Diffstat (limited to 'firmware/drivers/uda1380.c')
-rw-r--r-- | firmware/drivers/uda1380.c | 145 |
1 files changed, 145 insertions, 0 deletions
diff --git a/firmware/drivers/uda1380.c b/firmware/drivers/uda1380.c new file mode 100644 index 0000000000..e8b8c14399 --- /dev/null +++ b/firmware/drivers/uda1380.c | |||
@@ -0,0 +1,145 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2005 by Andy Young | ||
11 | * | ||
12 | * All files in this archive are subject to the GNU General Public License. | ||
13 | * See the file COPYING in the source tree root for full license agreement. | ||
14 | * | ||
15 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
16 | * KIND, either express or implied. | ||
17 | * | ||
18 | ****************************************************************************/ | ||
19 | #include "lcd.h" | ||
20 | #include "cpu.h" | ||
21 | #include "kernel.h" | ||
22 | #include "thread.h" | ||
23 | #include "power.h" | ||
24 | #include "debug.h" | ||
25 | #include "system.h" | ||
26 | #include "sprintf.h" | ||
27 | #include "button.h" | ||
28 | #include "string.h" | ||
29 | #include "file.h" | ||
30 | #include "buffer.h" | ||
31 | |||
32 | #include "i2c-h100.h" | ||
33 | #include "uda1380.h" | ||
34 | |||
35 | /* ------------------------------------------------- */ | ||
36 | /* Local functions and variables */ | ||
37 | /* ------------------------------------------------- */ | ||
38 | |||
39 | int uda1380_write_reg(unsigned char reg, unsigned short value); | ||
40 | unsigned short uda1380_regs[0x30]; | ||
41 | |||
42 | /* Definition of a good (?) configuration to start with */ | ||
43 | /* Not enabling ADC for now.. */ | ||
44 | |||
45 | #define NUM_DEFAULT_REGS 13 | ||
46 | unsigned short uda1380_defaults[2*NUM_DEFAULT_REGS] = | ||
47 | { | ||
48 | REG_0, EN_DAC | EN_INT | EN_DEC | SYSCLK_256FS | WSPLL_25_50, | ||
49 | REG_I2S, I2S_IFMT_IIS, | ||
50 | REG_PWR, PON_PLL | PON_HP | PON_DAC | EN_AVC | PON_AVC | PON_BIAS, | ||
51 | REG_AMIX, AMIX_RIGHT(0x10) | AMIX_LEFT(0x10), /* 00=max, 3f=mute */ | ||
52 | REG_MASTER_VOL, MASTER_VOL_LEFT(0x7f) | MASTER_VOL_RIGHT(0x7f), /* 00=max, ff=mute */ | ||
53 | REG_MIX_VOL, MIX_VOL_CHANNEL_1(0) | MIX_VOL_CHANNEL_2(0xff), /* 00=max, ff=mute */ | ||
54 | REG_EQ, 0, | ||
55 | REG_MUTE, MUTE_CH2, /* Mute channel 2 (digital decimation filter) */ | ||
56 | REG_MIX_CTL, 0, | ||
57 | REG_DEC_VOL, 0, | ||
58 | REG_PGA, MUTE_ADC, | ||
59 | REG_ADC, SKIP_DCFIL, | ||
60 | REG_AGC, 0 | ||
61 | }; | ||
62 | |||
63 | /* Returns 0 if register was written or -1 if write failed */ | ||
64 | int uda1380_write_reg(unsigned char reg, unsigned short value) | ||
65 | { | ||
66 | unsigned char data[4]; | ||
67 | |||
68 | data[0] = UDA1380_ADDR; | ||
69 | data[1] = reg; | ||
70 | data[2] = value >> 8; | ||
71 | data[3] = value & 0xff; | ||
72 | |||
73 | if (i2c_write(1, data, 4) != 4) | ||
74 | { | ||
75 | DEBUGF("uda1380 error reg=0x%x", reg); | ||
76 | return -1; | ||
77 | } | ||
78 | |||
79 | uda1380_regs[reg] = value; | ||
80 | |||
81 | return 0; | ||
82 | } | ||
83 | |||
84 | /** | ||
85 | * Sets the master volume | ||
86 | * | ||
87 | * \param vol Range [0..255] 0=max, 255=mute | ||
88 | * | ||
89 | */ | ||
90 | int uda1380_setvol(int vol) | ||
91 | { | ||
92 | return uda1380_write_reg(REG_MASTER_VOL, | ||
93 | MASTER_VOL_LEFT(vol) | MASTER_VOL_RIGHT(vol)); | ||
94 | } | ||
95 | |||
96 | /** | ||
97 | * Mute (mute=1) or enable sound (mute=0) | ||
98 | * | ||
99 | */ | ||
100 | int uda1380_mute(int mute) | ||
101 | { | ||
102 | unsigned int value = uda1380_regs[REG_MUTE]; | ||
103 | |||
104 | if (mute) | ||
105 | value = value | MUTE_MASTER; | ||
106 | else | ||
107 | value = value & ~MUTE_MASTER; | ||
108 | |||
109 | return uda1380_write_reg(REG_MUTE, value); | ||
110 | } | ||
111 | |||
112 | /* Returns 0 if successful or -1 if some register failed */ | ||
113 | int uda1380_set_regs(void) | ||
114 | { | ||
115 | int i; | ||
116 | memset(uda1380_regs, 0, sizeof(uda1380_regs)); | ||
117 | |||
118 | /* Initialize all registers */ | ||
119 | for (i=0; i<NUM_DEFAULT_REGS; i++) | ||
120 | { | ||
121 | unsigned char reg = uda1380_defaults[i*2+0]; | ||
122 | unsigned short value = uda1380_defaults[i*2+1]; | ||
123 | |||
124 | if (uda1380_write_reg(reg, value) == -1) | ||
125 | return -1; | ||
126 | } | ||
127 | |||
128 | return 0; | ||
129 | } | ||
130 | |||
131 | /* Initialize UDA1380 codec with default register values (uda1380_defaults) */ | ||
132 | int uda1380_init(void) | ||
133 | { | ||
134 | if (uda1380_set_regs() == -1) | ||
135 | return -1; | ||
136 | |||
137 | return 0; | ||
138 | } | ||
139 | |||
140 | /* Nice shutdown of UDA1380 codec */ | ||
141 | void uda1380_close(void) | ||
142 | { | ||
143 | uda1380_write_reg(REG_PWR, 0); /* Disable power */ | ||
144 | uda1380_write_reg(REG_0, 0); /* Disable codec */ | ||
145 | } | ||