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-rw-r--r--firmware/common/memcpy_a.S256
1 files changed, 0 insertions, 256 deletions
diff --git a/firmware/common/memcpy_a.S b/firmware/common/memcpy_a.S
index 3de319903e..9f6c813be3 100644
--- a/firmware/common/memcpy_a.S
+++ b/firmware/common/memcpy_a.S
@@ -18,11 +18,7 @@
18 ****************************************************************************/ 18 ****************************************************************************/
19#include "config.h" 19#include "config.h"
20 20
21#ifdef CPU_ARM
22 .section .icode,"ax",%progbits
23#else
24 .section .icode,"ax",@progbits 21 .section .icode,"ax",@progbits
25#endif
26 22
27#if CONFIG_CPU == SH7034 23#if CONFIG_CPU == SH7034
28 .align 2 24 .align 2
@@ -879,256 +875,4 @@ __memcpy_fwd_entry:
879 875
880.end: 876.end:
881 .size memcpy,.end-memcpy 877 .size memcpy,.end-memcpy
882#elif defined(CPU_ARM)
883/*
884 * linux/arch/arm/lib/memcpy.S and copy_template.S
885 *
886 * Author: Nicolas Pitre
887 * Created: Sep 28, 2005
888 * Copyright: MontaVista Software, Inc.
889 *
890 * This program is free software; you can redistribute it and/or modify
891 * it under the terms of the GNU General Public License version 2 as
892 * published by the Free Software Foundation.
893 */
894
895 .macro ldr1w ptr reg abort
896 ldr \reg, [\ptr], #4
897 .endm
898
899 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
900 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
901 .endm
902
903 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
904 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
905 .endm
906
907 .macro ldr1b ptr reg cond=al abort
908 ldr\cond\()b \reg, [\ptr], #1
909 .endm
910
911 .macro str1w ptr reg abort
912 str \reg, [\ptr], #4
913 .endm
914
915 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
916 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
917 .endm
918
919 .macro str1b ptr reg cond=al abort
920 str\cond\()b \reg, [\ptr], #1
921 .endm
922
923 .macro enter reg1 reg2
924 stmdb sp!, {r0, \reg1, \reg2}
925 .endm
926
927 .macro exit reg1 reg2
928 ldmfd sp!, {r0, \reg1, \reg2}
929 .endm
930
931 .text
932
933/* Prototype: void *memcpy(void *dest, const void *src, size_t n); */
934
935 .global memcpy
936 .type memcpy,%function
937memcpy:
938
939/*
940 * This can be used to enable code to cacheline align the source pointer.
941 * Experiments on tested architectures (StrongARM and XScale) didn't show
942 * this a worthwhile thing to do. That might be different in the future.
943 */
944//#define CALGN(code...) code
945#define CALGN(code...)
946#define PLD(code...)
947
948 enter r4, lr
949
950 subs r2, r2, #4
951 blt 8f
952 ands ip, r0, #3
953 PLD( pld [r1, #0] )
954 bne 9f
955 ands ip, r1, #3
956 bne 10f
957
9581: subs r2, r2, #(28)
959 stmfd sp!, {r5 - r8}
960 blt 5f
961
962 CALGN( ands ip, r1, #31 )
963 CALGN( rsb r3, ip, #32 )
964 CALGN( sbcnes r4, r3, r2 ) @ C is always set here
965 CALGN( bcs 2f )
966 CALGN( adr r4, 6f )
967 CALGN( subs r2, r2, r3 ) @ C gets set
968 CALGN( add pc, r4, ip )
969
970 PLD( pld [r1, #0] )
9712: PLD( subs r2, r2, #96 )
972 PLD( pld [r1, #28] )
973 PLD( blt 4f )
974 PLD( pld [r1, #60] )
975 PLD( pld [r1, #92] )
976
9773: PLD( pld [r1, #124] )
9784: ldr8w r1, r3, r4, r5, r6, r7, r8, ip, lr, abort=20f
979 subs r2, r2, #32
980 str8w r0, r3, r4, r5, r6, r7, r8, ip, lr, abort=20f
981 bge 3b
982 PLD( cmn r2, #96 )
983 PLD( bge 4b )
984
9855: ands ip, r2, #28
986 rsb ip, ip, #32
987 addne pc, pc, ip @ C is always clear here
988 b 7f
9896: nop
990 ldr1w r1, r3, abort=20f
991 ldr1w r1, r4, abort=20f
992 ldr1w r1, r5, abort=20f
993 ldr1w r1, r6, abort=20f
994 ldr1w r1, r7, abort=20f
995 ldr1w r1, r8, abort=20f
996 ldr1w r1, lr, abort=20f
997
998 add pc, pc, ip
999 nop
1000 nop
1001 str1w r0, r3, abort=20f
1002 str1w r0, r4, abort=20f
1003 str1w r0, r5, abort=20f
1004 str1w r0, r6, abort=20f
1005 str1w r0, r7, abort=20f
1006 str1w r0, r8, abort=20f
1007 str1w r0, lr, abort=20f
1008
1009 CALGN( bcs 2b )
1010
10117: ldmfd sp!, {r5 - r8}
1012
10138: movs r2, r2, lsl #31
1014 ldr1b r1, r3, ne, abort=21f
1015 ldr1b r1, r4, cs, abort=21f
1016 ldr1b r1, ip, cs, abort=21f
1017 str1b r0, r3, ne, abort=21f
1018 str1b r0, r4, cs, abort=21f
1019 str1b r0, ip, cs, abort=21f
1020
1021 exit r4, pc
1022
10239: rsb ip, ip, #4
1024 cmp ip, #2
1025 ldr1b r1, r3, gt, abort=21f
1026 ldr1b r1, r4, ge, abort=21f
1027 ldr1b r1, lr, abort=21f
1028 str1b r0, r3, gt, abort=21f
1029 str1b r0, r4, ge, abort=21f
1030 subs r2, r2, ip
1031 str1b r0, lr, abort=21f
1032 blt 8b
1033 ands ip, r1, #3
1034 beq 1b
1035
103610: bic r1, r1, #3
1037 cmp ip, #2
1038 ldr1w r1, lr, abort=21f
1039 beq 17f
1040 bgt 18f
1041
1042
1043 .macro forward_copy_shift pull push
1044
1045 subs r2, r2, #28
1046 blt 14f
1047
1048 CALGN( ands ip, r1, #31 )
1049 CALGN( rsb ip, ip, #32 )
1050 CALGN( sbcnes r4, ip, r2 ) @ C is always set here
1051 CALGN( subcc r2, r2, ip )
1052 CALGN( bcc 15f )
1053
105411: stmfd sp!, {r5 - r9}
1055
1056 PLD( pld [r1, #0] )
1057 PLD( subs r2, r2, #96 )
1058 PLD( pld [r1, #28] )
1059 PLD( blt 13f )
1060 PLD( pld [r1, #60] )
1061 PLD( pld [r1, #92] )
1062
106312: PLD( pld [r1, #124] )
106413: ldr4w r1, r4, r5, r6, r7, abort=19f
1065 mov r3, lr, pull #\pull
1066 subs r2, r2, #32
1067 ldr4w r1, r8, r9, ip, lr, abort=19f
1068 orr r3, r3, r4, push #\push
1069 mov r4, r4, pull #\pull
1070 orr r4, r4, r5, push #\push
1071 mov r5, r5, pull #\pull
1072 orr r5, r5, r6, push #\push
1073 mov r6, r6, pull #\pull
1074 orr r6, r6, r7, push #\push
1075 mov r7, r7, pull #\pull
1076 orr r7, r7, r8, push #\push
1077 mov r8, r8, pull #\pull
1078 orr r8, r8, r9, push #\push
1079 mov r9, r9, pull #\pull
1080 orr r9, r9, ip, push #\push
1081 mov ip, ip, pull #\pull
1082 orr ip, ip, lr, push #\push
1083 str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f
1084 bge 12b
1085 PLD( cmn r2, #96 )
1086 PLD( bge 13b )
1087
1088 ldmfd sp!, {r5 - r9}
1089
109014: ands ip, r2, #28
1091 beq 16f
1092
109315: mov r3, lr, pull #\pull
1094 ldr1w r1, lr, abort=21f
1095 subs ip, ip, #4
1096 orr r3, r3, lr, push #\push
1097 str1w r0, r3, abort=21f
1098 bgt 15b
1099 CALGN( cmp r2, #0 )
1100 CALGN( bge 11b )
1101
110216: sub r1, r1, #(\push / 8)
1103 b 8b
1104
1105 .endm
1106
1107
1108 forward_copy_shift pull=8 push=24
1109
111017: forward_copy_shift pull=16 push=16
1111
111218: forward_copy_shift pull=24 push=8
1113
1114
1115/*
1116 * Abort preanble and completion macros.
1117 * If a fixup handler is required then those macros must surround it.
1118 * It is assumed that the fixup code will handle the private part of
1119 * the exit macro.
1120 */
1121
1122 .macro copy_abort_preamble
112319: ldmfd sp!, {r5 - r9}
1124 b 21f
112520: ldmfd sp!, {r5 - r8}
112621:
1127 .endm
1128
1129 .macro copy_abort_end
1130 ldmfd sp!, {r4, pc}
1131 .endm
1132end:
1133 .size memcpy,.end-memcpy
1134#endif 878#endif
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