diff options
-rw-r--r-- | firmware/target/arm/mmu-arm.c | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/firmware/target/arm/mmu-arm.c b/firmware/target/arm/mmu-arm.c index db7f5e59cd..5fa05d1dc6 100644 --- a/firmware/target/arm/mmu-arm.c +++ b/firmware/target/arm/mmu-arm.c | |||
@@ -86,6 +86,17 @@ void enable_mmu(void) { | |||
86 | asm volatile("nop \n nop \n nop \n nop"); | 86 | asm volatile("nop \n nop \n nop \n nop"); |
87 | } | 87 | } |
88 | 88 | ||
89 | #if CONFIG_CPU == IMX31L | ||
90 | void __attribute__((naked)) invalidate_dcache_range(const void *base, unsigned int size) | ||
91 | { | ||
92 | asm volatile( | ||
93 | "add r1, r1, r0 \n" | ||
94 | "mcrr p15, 0, r1, r0, c14 \n" | ||
95 | "bx lr \n" | ||
96 | ); | ||
97 | (void)base; (void)size; | ||
98 | } | ||
99 | #else | ||
89 | /* Invalidate DCache for this range */ | 100 | /* Invalidate DCache for this range */ |
90 | /* Will do write back */ | 101 | /* Will do write back */ |
91 | void invalidate_dcache_range(const void *base, unsigned int size) { | 102 | void invalidate_dcache_range(const void *base, unsigned int size) { |
@@ -122,7 +133,20 @@ void invalidate_dcache_range(const void *base, unsigned int size) { | |||
122 | "mcr p15,0,%0,c7,c10,4\n" /* Drain write buffer */ | 133 | "mcr p15,0,%0,c7,c10,4\n" /* Drain write buffer */ |
123 | : : "r" (addr), "r" (end)); | 134 | : : "r" (addr), "r" (end)); |
124 | } | 135 | } |
136 | #endif | ||
137 | |||
125 | 138 | ||
139 | #if CONFIG_CPU == IMX31L | ||
140 | void __attribute__((naked)) clean_dcache_range(const void *base, unsigned int size) | ||
141 | { | ||
142 | asm volatile( | ||
143 | "add r1, r1, r0 \n" | ||
144 | "mcrr p15, 0, r1, r0, c12 \n" | ||
145 | "bx lr \n" | ||
146 | ); | ||
147 | (void)base; (void)size; | ||
148 | } | ||
149 | #else | ||
126 | /* clean DCache for this range */ | 150 | /* clean DCache for this range */ |
127 | /* forces DCache writeback for the specified range */ | 151 | /* forces DCache writeback for the specified range */ |
128 | void clean_dcache_range(const void *base, unsigned int size) { | 152 | void clean_dcache_range(const void *base, unsigned int size) { |
@@ -160,7 +184,19 @@ void clean_dcache_range(const void *base, unsigned int size) { | |||
160 | "mcr p15,0,%0,c7,c10,4 \n" /* Drain write buffer */ | 184 | "mcr p15,0,%0,c7,c10,4 \n" /* Drain write buffer */ |
161 | : : "r" (addr), "r" (end)); | 185 | : : "r" (addr), "r" (end)); |
162 | } | 186 | } |
187 | #endif | ||
163 | 188 | ||
189 | #if CONFIG_CPU == IMX31L | ||
190 | void __attribute__((naked)) dump_dcache_range(const void *base, unsigned int size) | ||
191 | { | ||
192 | asm volatile( | ||
193 | "add r1, r1, r0 \n" | ||
194 | "mcrr p15, 0, r1, r0, c6 \n" | ||
195 | "bx lr \n" | ||
196 | ); | ||
197 | (void)base; (void)size; | ||
198 | } | ||
199 | #else | ||
164 | /* Dump DCache for this range */ | 200 | /* Dump DCache for this range */ |
165 | /* Will *NOT* do write back */ | 201 | /* Will *NOT* do write back */ |
166 | void dump_dcache_range(const void *base, unsigned int size) { | 202 | void dump_dcache_range(const void *base, unsigned int size) { |
@@ -183,6 +219,19 @@ void dump_dcache_range(const void *base, unsigned int size) { | |||
183 | "mcr p15,0,%0,c7,c10,4 \n" /* Drain write buffer */ | 219 | "mcr p15,0,%0,c7,c10,4 \n" /* Drain write buffer */ |
184 | : : "r" (addr), "r" (end)); | 220 | : : "r" (addr), "r" (end)); |
185 | } | 221 | } |
222 | #endif | ||
223 | |||
224 | #if CONFIG_CPU == IMX31L | ||
225 | void __attribute__((naked)) clean_dcache(void) | ||
226 | { | ||
227 | asm volatile ( | ||
228 | /* Clean entire data cache */ | ||
229 | "mov r0, #0 \n" | ||
230 | "mcr p15, 0, r0, c7, c10, 0 \n" | ||
231 | "bx lr \n" | ||
232 | ); | ||
233 | } | ||
234 | #else | ||
186 | /* Cleans entire DCache */ | 235 | /* Cleans entire DCache */ |
187 | void clean_dcache(void) | 236 | void clean_dcache(void) |
188 | { | 237 | { |
@@ -223,4 +272,5 @@ void clean_dcache(void) | |||
223 | : : "r" (addr)); | 272 | : : "r" (addr)); |
224 | } | 273 | } |
225 | } | 274 | } |
275 | #endif | ||
226 | 276 | ||