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-rw-r--r--firmware/target/arm/as3525/kernel-as3525.c20
-rw-r--r--firmware/timer.c26
2 files changed, 16 insertions, 30 deletions
diff --git a/firmware/target/arm/as3525/kernel-as3525.c b/firmware/target/arm/as3525/kernel-as3525.c
index d8f0e23d30..966d3bf349 100644
--- a/firmware/target/arm/as3525/kernel-as3525.c
+++ b/firmware/target/arm/as3525/kernel-as3525.c
@@ -61,26 +61,18 @@ void INT_TIMER2(void)
61 61
62void tick_start(unsigned int interval_in_ms) 62void tick_start(unsigned int interval_in_ms)
63{ 63{
64 int phi = 0; /* prescaler bits */
65 int prescale = 1;
66 int cycles = KERNEL_TIMER_FREQ / 1000 * interval_in_ms; 64 int cycles = KERNEL_TIMER_FREQ / 1000 * interval_in_ms;
67 65
68 while(cycles > 0x10000)
69 {
70 phi++;
71 prescale <<= 4;
72 cycles >>= 4;
73 }
74
75 if(prescale > 256)
76 panicf("%s : interval too big", __func__);
77
78 CGU_PERI |= CGU_TIMER2_CLOCK_ENABLE; /* enable peripheral */ 66 CGU_PERI |= CGU_TIMER2_CLOCK_ENABLE; /* enable peripheral */
79 VIC_INT_ENABLE |= INTERRUPT_TIMER2; /* enable interrupt */ 67 VIC_INT_ENABLE |= INTERRUPT_TIMER2; /* enable interrupt */
80 68
81 TIMER2_LOAD = TIMER2_BGLOAD = cycles; /* timer period */ 69 TIMER2_LOAD = TIMER2_BGLOAD = cycles; /* timer period */
82 70
83 /* /!\ bit 4 (reserved) must not be modified 71 /* /!\ bit 4 (reserved) must not be modified
84 * periodic mode, interrupt enabled, 16 bits counter */ 72 * periodic mode, interrupt enabled, no prescale, 32 bits counter */
85 TIMER2_CONTROL = (TIMER2_CONTROL & (1<<4)) | 0xe0 | (phi<<2); 73 TIMER2_CONTROL = (TIMER2_CONTROL & (1<<4)) |
74 TIMER_ENABLE |
75 TIMER_PERIODIC |
76 TIMER_INT_ENABLE |
77 TIMER_32_BIT;
86} 78}
diff --git a/firmware/timer.c b/firmware/timer.c
index e9f11b6ae7..85e50ae3ca 100644
--- a/firmware/timer.c
+++ b/firmware/timer.c
@@ -109,23 +109,17 @@ void TIMER1_ISR(void)
109 109
110static bool timer_set(long cycles, bool start) 110static bool timer_set(long cycles, bool start)
111{ 111{
112#if CONFIG_CPU == SH7034 || defined(CPU_COLDFIRE) || CONFIG_CPU == AS3525 112#if CONFIG_CPU == SH7034 || defined(CPU_COLDFIRE)
113 int phi = 0; /* bits for the prescaler */ 113 int phi = 0; /* bits for the prescaler */
114 int prescale = 1; 114 int prescale = 1;
115 115
116#if CONFIG_CPU == SH7034 || defined(CPU_COLDFIRE)
117#define PRESCALE_STEP 1
118#else /* CONFIG_CPU == AS3525 */
119#define PRESCALE_STEP 4
120#endif
121
122 while (cycles > 0x10000) 116 while (cycles > 0x10000)
123 { /* work out the smallest prescaler that makes it fit */ 117 { /* work out the smallest prescaler that makes it fit */
124#if CONFIG_CPU == SH7034 || CONFIG_CPU == AS3525 118#if CONFIG_CPU == SH7034
125 phi++; 119 phi++;
126#endif 120#endif
127 prescale <<= PRESCALE_STEP; 121 prescale <<= 1;
128 cycles >>= PRESCALE_STEP; 122 cycles >>= 1;
129 } 123 }
130#endif 124#endif
131 125
@@ -178,10 +172,6 @@ static bool timer_set(long cycles, bool start)
178 172
179 return true; 173 return true;
180#elif CONFIG_CPU == AS3525 174#elif CONFIG_CPU == AS3525
181 /* XXX: 32 bits cycles could be used */
182 if (prescale > 256 || cycles > 0x10000)
183 return false;
184
185 if (start) 175 if (start)
186 { 176 {
187 if (pfn_unregister != NULL) 177 if (pfn_unregister != NULL)
@@ -193,8 +183,12 @@ static bool timer_set(long cycles, bool start)
193 183
194 TIMER1_LOAD = TIMER1_BGLOAD = cycles; 184 TIMER1_LOAD = TIMER1_BGLOAD = cycles;
195 /* /!\ bit 4 (reserved) must not be modified 185 /* /!\ bit 4 (reserved) must not be modified
196 * periodic mode, interrupt enabled, 16 bits counter */ 186 * periodic mode, interrupt enabled, no prescale, 32 bits counter */
197 TIMER1_CONTROL = (TIMER1_CONTROL & (1<<4)) | 0xe0 | (phi<<2); 187 TIMER1_CONTROL = (TIMER2_CONTROL & (1<<4)) |
188 TIMER_ENABLE |
189 TIMER_PERIODIC |
190 TIMER_INT_ENABLE |
191 TIMER_32_BIT;
198 return true; 192 return true;
199#elif defined CPU_COLDFIRE 193#elif defined CPU_COLDFIRE
200 if (prescale > 4096/CPUFREQ_MAX_MULT) 194 if (prescale > 4096/CPUFREQ_MAX_MULT)